AEHR earnings call analysis

NASDAQ:AEHR Q2 2026 Earnings Call Transcript Generated on 10/9/2026 Operator | Conference Operator: Greetings. Welcome to the Airtel Systems Fiscal 2026 Second Quarter Financial Results Conference Call. At this time, all participants are in listen-only mode. A question and answer session will follow the formal presentation. If anyone should require operator assistance during the conference, please press star zero on your telephone keypad. Please note, this conference is being recorded. I will now turn the conference over to your host, Jim Byers of Fondell Wilkinson Investor Relations.

Jim Byers | Host, Fondell Wilkinson Investor Relations

You may begin. Thank you, operator. Good afternoon. Welcome to Airtest Systems' second quarter fiscal 2026 financial results conference call. With me on today's call are Airtest Systems President and Chief Executive Officer, Gane Erickson, and Chief Financial Officer, Chris Ciu. Before I turn the call over to Gane and Chris, I'd like to cover a few quick items. This afternoon, right after market closed, Airtest issued a press release announcing its second quarter fiscal 2026 results. The lease is available on the company's website at air.com. This call is being broadcast live over the internet for all interested parties, and the webcast will be archived on the investor relations page of the company's website. I'd like to remind everyone that on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. These factors are discussed in the company's most recent periodic and current reports filed with the SEC. These forward-looking statements, including guidance provided during today's call, are only valid as of this date, and Airtest Systems undertakes no obligation to update the forward-looking statements. Now, with that, I'd like to turn the conference call over to Gane Erickson, President and CEO.

Gane Erickson | President and Chief Executive Officer

Thanks, Jim. Good afternoon, everyone, and welcome to our second quarter fiscal 26 earnings conference call. I'll begin with an update on the key markets we're targeting for semiconductor test and burn-in, with a particular focus on the common growth drivers we're seeing across these markets, which is namely the massive explosion of AI and data center infrastructure. After that, Chris will walk through our financial performance for the quarter, and then we'll open up the call for questions. While second quarter revenue was softer than anticipated, we made significant progress in both wafer-level burn-in and package-part burn-in segments and are very excited about our prospects moving forward. Based on customer forecasts recently provided to AIR, we believe our bookings in the second half of this fiscal year will be between $60 million and $80 million, which would set the stage for a very strong fiscal 27 that begins on May 30th. During the quarter, we made substantial progress with wafer-level burn-in engagements and production installations across AI processors, flash memory, silicon photonics, gallium nitride, and hard disk drives. We're encouraged to see that one of our key growth strategies focused on reliability solutions for the exploding demand for AI and data center infrastructure is beginning to bear fruit. In package part burn-in, We secured key new device wins for our Sonoma system, supporting high-temperature operating life qualifications for AI devices. These wins are expected to drive additional capacity at test houses, including at least one customer that is elected to move into production in late calendar 26, which we believe could result in meaningful volumes of Sonoma production systems. In addition, in the last month, we received a very large forecast from our lead Sonoma production customer for AI ASIC production capacity. This forecast is expected to drive very strong and potentially record bookings for the company this fiscal year and position us well for significant revenue growth next fiscal year, with their requested shipments starting in the first fiscal quarter of our next fiscal year. Taken together, our increased visibility across multiple end markets gives us great confidence in our outlook. As a result, we're reinstating financial guidance in fiscal 26, which we'll touch on later in today's call. Now let's talk about our key segments. Starting with our wafer-level burn-in during the quarter, we expanded engagements and completed additional production installations across several end markets. Our lead AI wafer-level burn-in customer continues development of its next generation processor and is currently discussing additional capacity with us. They're forecasting additional system and wafer pack capacity orders this fiscal year and plan to transition to our fully integrated automated wafer pack aligner for 300 millimeter wafers. We expect this customer to continue scaling and excited to support their growth. We also announced a strategic expansion of our partnership with ISE Labs during the quarter to deliver advanced wafer-level test and burn-in services for next-generation high-performance computing and AI applications. This partnership accelerates time to market, improves performance, and gives customers the option of either package part or wafer-level test and burn-in for their production volumes. ISE, together with its parent company, ASE, represents the world's leading outsourced semiconductor assembly and test, or OSAP, platform, serving a global roster of top-tier semiconductor customers. As part of our benchmark evaluation program with a top-tier AI processor supplier we announced last quarter, we completed development of our new fine-pitch wafer packs for wafer-level burn-in of high-current AI processors. These are currently in test with this potential customer's processors and are designed to validate our Fox XP production systems for wafer-level burn-in and functional test of their high-performance, high-power AI processors. We're currently completing startup procedures such as power-up sequencing, thermal profiling, test vectors, timing, and high-speed differential clocks, and expect to complete data collection this quarter. While we're demonstrating our new fine-pitch high-current wafer packs for this benchmark, Many customers can utilize lower-cost wafer pack designs if certain design-for-test rules are incorporated up front. These approaches reduce cost and lead time and are especially attractive to customers focused on faster time-to-market or wafer-level high-temp operating life qualification. We also have two additional AI processor companies planning wafer-level benchmark evaluations since last quarter's earnings call. These benchmarks typically take about six months, and we expect to make meaningful progress beginning this quarter. Both customers are evaluating wafer-level test and burn-in as an alternative to package part or system-level test for large advanced AI modules that combine multiple AI accelerators and stacked high-bandwidth memory. Moving burn-in upstream to the wafer level significantly reduces cost and yield risk by avoiding scrapping expensive substrates and memory stacks when early failures occur later in the process. We have seen estimates that show the cost of the substrate is more than a single processor and the cost of the high bandwidth memory is even higher. Turning to flash memory, we completed our wafer level benchmark with a global leader in NAND flash just prior to the holidays. The customer has now taken the wafers back for further processing to validate correlation with their internal process. This benchmark demonstrated our ability to test flash memory wafers with significantly higher parallelism and power than is possible using traditional probers and group probers from companies such as TEL or Acratech. We've also proposed the next generation solution enabling test of a new emerging flash memory device called High Bandwidth Flash or HBF designed for AI workloads. This proposed solution leverages our Fox XP platform, wafer packs, and auto-aligner technology, and would support single-touchdown, high-power tests on 300-millimeter wafers. While development of this system would take over a year following customer commitment, we believe this represents a compelling entry point into a large and evolving memory market. We look forward to sharing more details as this progresses. Turning to silicon photonics, we believe that silicon photonics used in data center and also chip-to-chip I.O. is going to be a significant market driving production burning capacity for our Fox wafer-level burning systems and wafer packs. Our lead customer has now firmed up its production ramp, which we expect to begin early next fiscal year. While this timing is later than previously expected, it aligns with recently announced AI processor platforms and positions as well for calendar 2026 orders and deliveries in fiscal 27. We've also finalized a forecast with another major Silicon Photonics customer, initially targeting data center applications with a roadmap toward optical IO. We expect to book their initial turnkey FOX system soon with delivery planned for May of this year. In gallium nitride power semiconductors, We continue to support our lead production customer, though we experienced delays related to unanticipated high-voltage bolt conditions that required wafer packs and protection circuit redesigns. This delayed approximately $2 million in wafer pack shipments from last quarter into this quarter, along with some system enhancements. Shipments have now resumed, and lessons learned have significantly strengthened our GAN power supply burning capabilities. If anyone tells you that testing and burning in full wafers of GaN power semiconductors with up to 600 volts or more is easy, don't listen to them. We also continue to engage with multiple new potential GaN customers and are developing wafer packs for several new device designs that are expected to go to high-volume production for applications like data center infrastructure and power delivery automotive electrical power distribution on both ICE and hybrid electric vehicles, and even power semiconductors used for electrical breakers. AIR has a unique solution that can deliver full turnkey, fully automated wafer handling and probing for test and burn-in of GaN wafers in sizes from 6 to 8 inches and even 12 inches or 300 millimeter wafers. Turning to silicon carbide, as we previously discussed, silicon carbide demand has been weighed toward the end of this fiscal year. Customers continue to be optimistic about this market and their capacity needs. But we've tried to take a very conservative stance that is mostly show us the orders before we believe them. Our lead customer recently transitioned from 150 millimeters to 200 millimeter wafers, nearly doubling output without adding new Fox XP systems and supported by AERA's proprietary wafer packs that we developed to accommodate both 150 and 200 millimeter wafers, contacting 100% of the dye on each in a single touchdown. They're now seeing additional needs for wafer packs this year, but additional capacity for systems appears to be a year out. We pushed out expected orders until next fiscal year from our near-term forecast, but have capacity of systems or wafer packs to continue to support their surge capacity needs as well as our other silicon carbide customers. While electric vehicle-related demand has slowed industry-wide, we remain well-positioned with the most competitive wafer-level burn-in solution available, and we expect to benefit when growth resumes. In semiconductors used in data center hard disk drives, we're installing the additional Fox CP systems for a major supplier of hard disk drives for wafer-level burn-in of their special components in their drives. They've indicated plans for additional purchases later this calendar year. While their device unit volumes are very large, the overall revenue opportunity remains modest due to short stress times and the massive parallelism achieved on our Fox CP system and proprietary high-power wafer-packed wafer contactors. Now, let me talk about package part burn-in. We're seeing continued momentum in package part qualification and production burn-in for AI processors, driving growth in our new Sonoma ultra-high power package part burn-in systems and consumables. As we announced today in a separate press release, during our fiscal third quarter to date, we have received orders from multiple customers, totaling more than $5.5 million for our Sonoma ultra-high power package part burn-in systems, including initial orders from a premier Silicon Valley test lab for our newly introduced higher power configured Sonoma system that can also support full automation. These orders already exceed the total Sonoma orders for the entire second quarter, highlighting the accelerating demand we're seeing for our package-level burden of high-powered AI and compute devices. This quarter, we also secured key new device wins on the Sonoma platform, or high temp operating life qualification. These wins are expected to drive additional capacity at test houses, with at least one customer planning to transition to production later this calendar year, generating significant system demand. Our lead package part burn-in production customer for AI processors continues to ramp and is forecasting substantial growth in 2026 and beyond. Although we have not yet received the purchase order, we have received a substantial forecast from this customer for AI ASIC production capacity, with requested Sonoma production, package part burn-in system, and BIM shipments beginning in the fiscal first quarter of 27. That starts May 30th, which we expect to contribute to very strong bookings in fiscal 26 and generate significant revenue growth in fiscal 27. This customer also plans to introduce much higher power A6 later this year, for which we are already developing the high-temp operating life qualification burden modules and sockets to be used on the Sonoma systems at one of the premier Silicon Valley test services companies that have many systems installed. This AI accelerator ASIC processor is also forecasted to go to production burden and drive even higher volume needs for production burden systems downstream at the OSATs in Asia. We feel we're very well positioned with our Sonoma system for this production capacity need and believe this could drive very substantial volumes of Sonoma systems in our next fiscal year. During the quarter, we completed development of a next generation fully automated higher power Sonoma system supporting up to 2,000 watts per device. This system enables continuous flow operation, improved throughput, and seamless transition from qualification to high volume production using the same fixtures and sockets. These capabilities enable customers who are focused on high-temp operating life reliability testing to have a system that is fully software and hardware compatible with the Sonoma systems they have installed, which simplifies and accelerates time to market that's critical for HTAL testing and new AI processors. This Sonoma burn-in system can also simply bolt on a fully automated handler developed and sold by Airtest as a turnkey solution to allow hands-free operation with less than a couple of minutes of overhead per burn-in cycle, which is amazing for production burn-in needs. We're also seeing increased demand for our lower-power Echo and Tahoe package part burn-in systems, driven by our installed base of more than 100 systems across over 20 semiconductor companies worldwide. But I'll wait for another call to discuss these systems and the markets they serve in more detail. As stated last quarter, the rapid advancement of generative AI and the accelerating electrification of transportation and global infrastructure represent two of the most significant macro trends impacting the semiconductor industry today. These transformative forces are driving enormous growth in semiconductor demand, while fundamentally increasing the performance, reliability, safety, and security requirements of the devices used across computing and data infrastructure, telecommunications networks, hard disk drive and solid state storage solutions, electric vehicles, charging systems, and renewable energy generation. As these applications operate at ever higher power levels and in increasingly mission-critical environments, The need for comprehensive test and burn-in has become more essential than ever. Semiconductor manufacturers are turning to advanced wafer-level and package-level burn-in systems to screen for early life failures, validate long-term reliability, and ensure consistent performance under extreme electrical and thermal stress conditions. This growing emphasis on reliability testing reflects a fundamental shift in the industry. from simply achieving functionality to guaranteeing dependable operation throughout a product's lifetime, a requirement that continues to expand alongside the scale and complexity of next-generation semiconductor devices. This year, we're making significant progress expanding into additional key markets for our semiconductor test and burning solutions, including AI processors, gallium nitride power semiconductors, data storage devices, silicon photonics, integrated circuits, and flash memory. This diversification of our markets and customers is significant, given our revenue concentration in silicon carbide for electric vehicles the last two years. This progress and key initiatives expands our total addressable market, diversifies our customer base, and provides us with new products, capabilities, and capacity, all aimed at driving revenue growth and increasing profitability. The progress we made this quarter with a significant number of customer engagements and production installations provides improved visibility into future demand. As a result, we're reinstating guidance for the second half of fiscal 26. For the second half of fiscal 26, which began November 29th, 25, and ends this May 29th of 26, AIR expects revenue between $25 million and $30 million. As stated earlier, although we're not providing formal bookings guidance, based on customer forecasts recently provided to AIR, we believe our bookings in the second half of this fiscal year will be much higher than revenue, between $60 million and $80 million in bookings, which would set the stage for a very strong fiscal 27 that begins on May 30th of 2026. With that, let me turn it over to Chris, and then we'll open up the lines for questions.

Chris Ciu | Chief Financial Officer

Thank you, Gane, and good afternoon, everyone. I'll begin with bookings and backlog, then walk through our second quarter financial performance, cash position outlook, and investor activity. The company recognized bookings of 6.2 million in the second quarter of fiscal 2026, compared to 11.4 million in the first quarter. At the end of the quarter, our backlog was 11.8 million. Importantly, during the first six weeks of the third quarter, we received an additional 6.5 million in bookings. This increase was driven primarily by an order from a premier Silicon Valley test lab for our newly introduced high power configured Sonoma system, which we announced this afternoon. Including this recent bookings, our effective backlog has now grown to 18.3 million, providing increased visibility as we move through the remainder of fiscal 2026. Turning to our second quarter results, revenue was 9.9 million, down 27% from 13.5 million in prior year period. The decline was primarily driven by lower shipments of wafer packs, partially offset by stronger demand for our Sonoma systems from our hyperscaler customer. Contacted revenues, which include wafer packs for our wafer-level burn-in business and BIMs and BIPs for our packaged part burn-in business, totaled 3.4 million. representing 35% of total revenue. This compares to 8.6 million or 64% of revenue in the second quarter last year. Non-GAAP growth margin for the second quarter was 29.8% compared with 45.3% a year ago. The year-over-year decline reflects lower overall sales volume and a less favorable product mix as last year's quarter included a higher proportion of higher margin wafer pack revenue. Non-GAAP operating expenses in the second quarter were 5.7 million, down 4% from 5.9 million in Q2 last year. The decrease was primarily due to lower personnel related expenses, which were partially offset by high research and development costs, including higher project spending, as we continue to invest resources in AI benchmark initiatives and memory related programs. As previously announced, We successfully closed the in-cow facility on May 30th, 2025, and completed the consolidation of personnel and manufacturing into its Fremont facility at the end of fiscal 2025. During the quarter, we negotiated an early lease termination with the landlord, reducing our obligation by five months of rent. As a result, we recorded a reversal of $213,000 related to a previously accrued one-time restructuring charge. During the quarter, we recorded an income tax benefit of 1.2 million, resulting in an effective tax rate of 27.3%. Non-GAAP net loss for the quarter, which excludes the impact of stock-based compensation, acquisition-related adjustments, and restructuring charges, was 1.3 million, or negative four cents per diluted share, compared to net income of 0.7 million, or two cents per diluted share in the second quarter of fiscal 2025. Turning to cash flow, we used 1.2 million in operating cash during the second quarter. We ended the quarter with 31 million in cash, cash equivalents, and restricted cash, up from 24.7 million at the end of Q1. The increase was primarily due to proceeds from our at-the-market equity program. As a reminder, in the second quarter of fiscal 2025, we filed a new 100 million S3 self-registration that was approved by the SEC for three years. followed by an ATM offering of up to $40 million. During the second quarter fiscal 2026, we raised $10 million in gross proceeds through the sale of about 384,000 shares. At quarter end, 30 million remained available under the ATM. We intend to utilize the ATM selectively with a disciplined approach focused on market conditions and shareholder value. Looking ahead to the second half of fiscal 2026, which began on November 29th, 2025 and ends on May 29th, 2026, we expect total revenue between 25 million to 30 million and non-GAAP net loss per diluted share between negative nine cents and negative five cents for the six month period. On the investor relations front, last month on December 17th, 2025, Lake Street Capital initiated annual research coverage on Airtest, along with equity research firm Freedom Broker, which initiated coverage last June. There are now a total of four research firms covering the company. Lastly, look at the investor relations calendar. We will meet with investors at the 20th Annual Needham Growth Conference in New York on Tuesday, January 13th, and then return to New York in February for the 15th annual Susquehanna Technology Conference on Thursday, February 26th. We'll also be participating virtually in the Oppenheimer Emerging Growth Conference on Tuesday, February 3rd. We hope to see you at these conferences. That concludes our prepared remarks. We're now happy to take your questions. Operator, please go ahead.

Operator | Conference Operator

Thank you. At this time, we will be conducting a question and answer session. If you would like to ask a question, please press star 1 on your telephone keypad. A confirmation tone will indicate your line is in the question queue. You may press star 2 if you would like to remove your question from the queue. For participants using speaker equipment, it may be necessary to pick up your handset before pressing the star keys. One moment, please, while we poll for questions. Once again, please press star 1 if you have a question or comment. Our first question comes from Christian Schwab with Craig Hallam.

Please proceed. Christian Schwab | Analyst, Craig-Hallum Capital Group

Again, thanks for all the details on the call. What wasn't clear to me exactly is on the booking strength, potential booking strength of 60 to 80 million in the second half of this fiscal year. Is that almost entirely on the AI accelerator processor line?

Gane Erickson | President and Chief Executive Officer

There's some silicon carbide, not much, like not very much at all. There is some silicon photonics for sure, but the bulk of it is across wafer level and package part burn-in for AI processors, yes.

Christian Schwab | Analyst, Craig-Hallum Capital Group

Okay, perfect. And then, given that such a material bookings from the AI processor market, can you give us any indication or idea, you know, I know we've talked about the opportunity of that marketplace being bigger than silicon carbide, but, you know, what's narrow it down to, you know, kind of a multi-year time frame, kind of including 27 and 28. Do you see that business after initial orders expanding meaningfully from there?

Gane Erickson | President and Chief Executive Officer

We do. We do. We do. And we've been taking a pretty conservative stance – On how large, particularly AI and the wafer-level side of it is, and conservative may not be fair, candidly, we're still trying to get our arms around how big it is. What we get is visibility of a specific, you know, GPU or CPU or, you know, network processor or an ASIC. And then You know, we hear these things from the customer, and then we look externally, and what are they telling the street, and try and correlate through those lookups. And I'd say pretty consistently we hear bigger numbers from the customer than the street. Not sure what that all means, okay? And then as they give us test time estimates of what the burning conditions are, we can start to put some numbers around it. But, you know, a single processor – So for some of these big guys at wafer-level burn-in is, you know, 20, 30 systems or so. And these are $4 million or $5 million machines. So you get a feel for the size of what that looks like. And, you know, the, you know, estimates of, you know, today, if you were to look at AI spend in test between test and burn-in, you know, is it $8, $10 billion? Yes. maybe $15 billion or so. I mean, it's a really large number. So we want to get ahead of ourselves here. But, you know, when customers ask you things like, how many can you make? So can the AI business be measured in hundreds of millions of dollars for air test, you know, a few years out? Yes, for sure. Now, what's interesting is that we're in this – I think it's an awesome position to be in because the Sonoma system, you know, is a highly preferred system for HTAL, the high-temp operating life reliability testing for these AI processors. It has the largest installed base in all the test houses around the world. We're getting people that approach us because we are like, I don't want to say we're the de facto standard, that's probably bold, but we have more capacity than everybody else, and therefore they are saying you're kind of the go-to guy. I like those words. And we can build lots of them. So customers are using that, and we get a front row seat to actually bring them up. Then we say, oh, by the way, you know, if you want, you can take this machine, add production handling to it, and do production on it. In the meantime, if you come to our facility and you do a tour and you can see that production test cell for the Sonoma automation, we, of course, will walk you by a Fox wafer-level burn-in test cell and mention, oh, by the way, that happens to be doing a benchmark on a 300-millimeter wafer. We can't tell you who it is. And so they're like, well, what is that? So we're in a position to be able to talk about both of them. and the ASPs are actually higher on the wafer level side of things, but the value proposition way outweighs that because of the yield advantage of doing it wafer level. The yield savings dwarfs any of the costs of the cost to test the wafer level burden. So as we get our arms around the market, the market data that would be out there would be package part because no one's doing wafer level except for us. And so we're creating our own models related to, okay, for that unit capacity, if you went to wafer-level burn-in, what would that look like? Kind of similar to what we had to go through in the original silicon carbide side of things, you know, if the whole market. And we're not saying, you know, everybody included, NVIDIA and Google and Microsoft and Tesla and these guys all went with us. How big is that market? We haven't even tried to put our arms around that yet.

But it's substantial. Christian Schwab | Analyst, Craig-Hallum Capital Group

Great. And then I guess one last question, if I may, and follow up on your comment about capacity. You know, how many systems do you think you're capable of manufacturing in a year for wafer level?

Gane Erickson | President and Chief Executive Officer

We have talked to customers about capacities exceeding 20 systems a month. at either package or wafer level. If we had to, we could ship 20 systems a month of each during this calendar year. Now, that's bigger than our forecast by a lot. But you know what? When people are saying, could you do something like this and intercept something, it's like if they gave you an order for 50 or 100 Sonomas, how long is it going to take you to build them?

Makes sense. Christian Schwab | Analyst, Craig-Hallum Capital Group

Makes perfect sense. No other questions. Thanks, Gabe.

You're welcome. Operator | Conference Operator

The next question comes from Jed Dorsheimer with William Blair.

Please proceed. Unidentified Participant

Hey, Jed. Oh, Jed.

Gane Erickson | President and Chief Executive Officer

We got you on mute, Jed.

Jed Dorsheimer | Analyst, William Blair

Oh, okay. I was that guy. So, anyways, you got me. Oh, there you go. Yep, yep. All right. So thanks for taking my question. Yeah, I guess maybe just to start, on the wafer level, you know, I think your prior comments around the timing of the benchmark, it seems like that's taken a little bit longer. And I'm just wondering, you know, is that a function of – is it because it's new and what you're seeing is from the customer is that they're changing parameters or that's extending that out? Because I think you had maybe talked about, you know, by February timeframe, and we're almost, you know, we're... Do you want me to throw my customer under the bus?

Gane Erickson | President and Chief Executive Officer

Is that what you're trying to tell me? No, no, no. No, no, no, no, no. Let me answer that. No, I got it. I got it. No, it's totally fair, okay? What I do in all of these things is try to describe exactly what we feel, what we know, what we knew at the time. One of the things that's very interesting and fun about this particular customer who is a very notable customer. When they gave us, and I don't think I've overstimulated, when they gave us the vectors, the test vectors, etc., they were giving it off of a platform from package level. Package and wafer are different. We had a huge arm wrestle with them related to what they could actually do at wafer level and also to demonstrate to them significant DFT, lower pin count modes, et cetera, to be able to do it at wafer level, which was a big deal because they never understood that because, of course, nobody's ever done this before with us. I'll just leave it at this. They actually gave us some things that were implied based upon package that weren't totally applicable to wafer level, and we struggled with some of that. And it turns out, so it actually did delay a little bit. I think it's mutually understood. It's like, oh, sorry, you know. We were thinking in package, we forget about wafer and sort. And that's a growing thing. We've seen this with other customers. On the very first time you're doing wafer-level burn-in, you just don't think about it from... the challenges or the differences at what happens when you're talking about a device that shares common substrates or, you know, from a probing environment. So is it longer? Maybe a little bit, you know, measured in, you know, weeks or a couple months or something. But, you know, some of the things that, like, mechanically, the way for physical contact to the device, to using our auto aligner to pack these new, fine pitch wafer packs, the test plan itself, the vectors, those things were all going along pretty well. So I wish it was a little bit sooner, but I think we're still very much on track to try and get them some data over the next, you know, couple months here, or even maybe even this month. So now the question, of course, parlays into what do they do with it? What's the timing? You know, do you understand what device they want to cut in? We do. We're not going to share that with you guys. You know, are we going to make it? We believe we're still, you know, there's lots of reasons to actually want to cut in wafer-level burn-in. And the sooner, the better. So I'm actually, you know, we're really excited about this particular one. And then now we've got another couple guys that are saying, pick me, pick me, too. and are generating the information to give us so that we can actually do design reviews and walk through a wafer pack design for them as well.

Jed Dorsheimer | Analyst, William Blair

Got it. That's helpful. Thanks. And I just want to address the potential of cannibalization between package and wafer level. And if I read through your comments, it seems like the – AI processor is what's moving along with this customer on the wafer level. You had mentioned briefly, actually, on the ASIC side. Are you anticipating that the ASICs basically run with package level and that AI processors are wafer level, or are you anticipating both at wafer level?

Gane Erickson | President and Chief Executive Officer

Thanks. Thanks. Yeah, okay. So vocabulary for everybody that's listening out there, right? So when you talk about processors and the AI, you know, arguably there's even maybe at least two or three different broad flavors of them, okay? You're going to have the actual GPU if it's an NVIDIA or ASIC when you talk about everybody else's. In reality, the GPU is kind of an ASIC at NVIDIA too. Jensen said that at one point. These are AI accelerator platforms, okay? And they can be used for language models or for inference type things. There's also processors that like CPUs, like Intel or Grace or Vera type CPUs and others that are making them. that are also going through a burn-in process. And then you could argue there's even network processors and things like that. But generally, when we talk about AI processors, we're generally in the CPU and GPU type or ASIC type that are combined together in these AI processor, you know, clusters. And things like you hear at GB200 is Grace CPU and two Blackwell processors AI accelerators in one package, if you will, or in one cluster. What's happening with the roadmap is that devices are going from, you know, a single AI accelerator or CPU in a package to a package that includes embedded memory, like high bandwidth memory and high bandwidth flash over time. and then to having more than one compute chip in it, so having two processors in it or four or eight, like you look at the Intel or the AMD roadmap. Everyone has a roadmap to two or four more AI processors on a single substrate. What's happening is that there is a – the qualification of those are all done today in a full package. The whole device in a big substrate is done, and it can take months to even go to get the packaging to qualify that. So there are people that would like to be able to qualify the processor inside when it's still in wafer form, right? From a production perspective, the value proposition is you're burning in these devices – And when they fail, you take out the other compute chip and all the memory plus the co-auth substrate, which costs more than the silicon of the compute chip itself. So the roadmap is getting more intense. So there's people that are like, oh, I want to evaluate this for this device. This would make sense. But, boy, that next one makes twice as much sense, and the one next to that is four times as much sense because of this evolution. So, you know, a lot of times we discuss, okay, is there a window? Like what happens if you just miss this one device? It doesn't feel like that. It's a treadmill of you can always step on. And the customers are like, okay, how do I cut you in? I've said publicly that our large package part production customer, we've talked about it as an ASIC hyperscaler, they're actually on Sonoma production. We're qualifying their next device that's going to go to production, we believe, and hope it'll go on Sonoma as well. The third one they're giving us design files of so we can make sure that Sonoma is ready for that. But they've also said, you know what, by then maybe we'll want to consider FoxWave's a little burn-in. And the interesting thing is, it's like, well, what will you do with all the package systems from us? You know, who cares? You know, it's like, what? Because if I can move it to wafer level... I don't need to do it in package anymore. Now, will it cut over just like that? We'll see. I think the world's going to be both for a long time, and we're in a great position to do both. But is there cannibalization? For sure. We had a customer come in who wanted to talk about what we thought was packaged for burden. Alberto, our VP over the package for our business, and I met with them. And 15 minutes into the meeting, he goes, I'd like to talk about wafer level. And Alberto looked over at me, and I'm like, okay, new slides. You know, it's like, so at least we got both. And, you know, we're in a great position. And actually, I would say all three. We do the high-temp operating life today only at package over time at wafer level. And we do production burn at either package or wafer level. So, a great front row seat.

Jed Dorsheimer | Analyst, William Blair

That's helpful. I'll jump back in the queue.

Thanks. Gane Erickson | President and Chief Executive Officer

Okay. Thanks, Jed.

Operator | Conference Operator

Our next question comes from Max Michaelis with Lake Street Capital.

Please proceed. Max Michaelis | Analyst, Lake Street Capital

Hey, Max. Hey, guys. Thanks for taking my question. First one for me, just around the bookings guide, I know you previously shared that's majority of around AI. But just given the distinction between the low end and the high end, if we just take the midpoint around 70 million, I mean, to get to that 80 million, is that all basically around AI or does that suggest any improvement around silicon carbide or GaN?

Gane Erickson | President and Chief Executive Officer

You know, it's the least in that number is silicon carbide, okay? And then GaN is pretty close. Hard disk drive's a little bigger than silicon photonics is a chunk. I mean, we've got production systems in there for our lead customer. We have a new customer that wants a system. They want it shipped by May. We're, you know, suggesting to them that they really should get their order in before we ship it. Joke, joke. I'm kidding. It's a challenge right now because they're like, please, please build it. We actually have a system on our floor, and if they get their PO in, if you're listening, you get to get it. If not, we'll give it to the next guy. But anyhow, and then it would be wafer-level burn-in, and then I think package is the biggest. I'm sorry, wafer-level burn-in of AI, and then package part AI is the biggest.

Max Michaelis | Analyst, Lake Street Capital

Okay. So, yeah, that just, I suggest the $16 million, $80 million suggests just greater volume. orders from wafer-level burn-in. Okay. And then lastly, I haven't had time to run through the entire press release, but that $5.5 million order you noted in your prepared remarks, can you share some more detail on that? Is there anything new that we should be looking for that's just kind of standard?

Gane Erickson | President and Chief Executive Officer

You know what? It has a mix of some customers that already had Sonomas that were buying more. that were AI-related. It had some far-end modules that was important because it was for a new design of a really expected-to-be high runner that's going to production. It has a big order from what we call a premier Silicon Valley test services company. We'll leave it at that. They actually bought a number of the new Sonoma configurations which are the very high power ones that allow them to go to 2,000 watts. We have some devices that we're going to be testing this spring that are almost 2,000 watts per device, right? And everybody's out there talking about how can you do, you know, what does it take to get to 1,000 watts? We're jumping right past that. And this is in a high-volume Sonoma system, so they'll be able to test a large number of devices in that system And I think the numbers – I should know this number. I think it's 44 devices. But, I mean, it's a large number of devices to be able to test those. And it's either – by the way, it's either 22 or 44. I should know that. Sorry, folks, to go through the math on that particular application because of the number of resources and power supplies and things. But it's the biggest part we've seen that's in development, and that's going to be going to production. So that's a big deal. So it's a combination of several different orders. Every one of them is kind of sort of strategic to us.

Max Michaelis | Analyst, Lake Street Capital

All right. Thanks for taking my questions. You're welcome. Thanks, Max.

Operator | Conference Operator

The next question comes from Larry Shlebina with Shlebina Capital.

Please proceed. Larry Shlebina | Analyst, Shlebina Capital

Hey, Larry. We try to line up your ramp or at least your demand for the systems that you're working on developing for these customers on the AI processors with what's publicly disclosed in terms of the product launch. Is there a case where they may start up on package part, wherever they have the capacity to do that, and then when they feel comfortable, maybe if it's after the product's launched, Would they cut over the wafer-level burn-in because it's so much more efficient and saves them money? Would they do that, or would they just do it initially on a brand-new product launch at the beginning?

Gane Erickson | President and Chief Executive Officer

That's kind of – do you have a sense of that? Okay, so there's two things in there. What I definitely see happening is, you know, we know for a fact a customer was doing system-level – a rack test, okay – And the only time they identified infant mortality or early life failures was when it's installed in the data center. Pretty nasty, okay? That's test or not or burn. And so they said, we'll run it for two weeks, and if it hasn't died, we'll accept it, you know, kind of thing. And then they'll actually plug it into the network. Pretty expensive way of doing it. Then there are companies like AEM and Advantest and Teradyne that have talked about System-level test machines, which is a type of ATE machine that is designed to be doing a high-speed insertion and boot up, like, the operating system, it's a great way to do a very high degree of test coverage for a specific application. People were saying, oh, we're going to do burn-in with that. Well, that doesn't really, you know, those systems are designed for high speed. They're designed to be at the user mode. They're designed to run cold. They're not really designed for burn-in, and they're quite expensive and large. But the market was pulling on that because it's sure better than doing it in Iraq. And there wasn't another system available in what a lot of people refer to as ovens, which is a large-scale system that you put lots of burn-in modules or trays with lots of devices and test all at once. Those were like from KYC or something, maybe 600 watts and below or something, and there really wasn't a tool out there for that. This is where Sonoma was pulled up because we were doing, NCAL was using it for the high-temp operating life, but it's like, well, wait a minute, can I use that in production? Can you add automation? Can you do these things, support, and can you, you know, quadruple or, you know, 50x your capacity? So that's where Sonoma is coming in. When Sonoma enters that market, doing system-level test or rack test makes no sense whatsoever. So it's highly competitive as that. Now, having said that, wafer-level burn-in is even better. But a lot of people may say, well, I need to think through that. You know, where do I put that insertion? You know, I might need to implement some design for test modes to be able to implement it, at least to take advantage of the very low-cost, you know, full wafer contactors from Airtest and things like that. So I think it's an evolution, but I think – You know, the conversation we have with customers is they're like, I need package-bar burn-in. Let's talk about that. But, boy, wafer-level burn-in would be better. How do we engage on that? And then specifically on a per-customer basis, you know, I don't want to get too carried away with our strategy, but if you have an installed base of something, you know, package-bar burn-in systems or, you know, I could go in and displace you with maybe Sonoma and But it's probably better for me to go displace you with wafer-level burn-in because it's not even a price thing in that sense. It's yield or capacity. So it depends on the customer, and we have some customers that have some devices that want to think about wafer-level, some they want to think about package, some they want to think about package, and then eventually the wafer-level over time. Okay. I hope that wasn't – as I look back, that was pretty confusing. But, you know, there's – it's an evolution of it, and, you know, guess what we do? The customer's always right. You tell me what you want, and, you know, we're in.

Larry Shlebina | Analyst, Shlebina Capital

Well, if you're – all these evaluations they have going on with wafer-level burning, if it takes longer and the product ends up getting launched, would they still cut over to some portion of the production – on wafer-level burn-in, once it's proven out for the particular product or the predicted, would they do that midstream?

Gane Erickson | President and Chief Executive Officer

I think it depends. It's not a slam dunk. I mean, I think traditionally people will start a product and, you know, do the release of that one product on one test platform or something, and then you cut in on the next one. I think that'd be fair to say that. But there are certain devices we know that their intended application, there's two or three different applications for it. So, you know, for a lot of language model, maybe they think about it one way, but if it's going to be automotive, then that's a different thing, right? So even within a product, there might be an evolution. Or they get by until they can implement wafer-level burden. That particularly comes in the fact when you think about a multi-chip module. As soon as you could do wafer-level burn-in, if I could save you 1% yield per die on a four-die AI processor that has a $15,000 bomb, of course you would do that, right? I'm not sure if they would. We're trying to be as open as we can. We know as much as we know, but... You know, there's definitely advantages to do wafer level. I mean, ultimately, that's the most, you know, kind of the best place you could ever do it. And if you implement some DFT and you implement some of the things we do, I could build you a wafer pack in eight weeks. Have you on wafer?

Larry Shlebina | Analyst, Shlebina Capital

The shift gears on the flash benchmark that you completed right now a little bit ago before the holidays, what do you expect the customer to get back to you and, you know, And more importantly, when do you expect them to come with an order?

Gane Erickson | President and Chief Executive Officer

I was waiting for somebody. Yeah, that's where my head's at, too. My guess is, Larry, the next couple months or so for them really to get back, depending on how they – the wafer's going back to test, which is tested at wafer. I don't think they're going to package it up and go through some stress qualification test. That might be something. But, you know, we've already had some design reviews with them on our new tester and planted the seeds. They were very impressed is how I would describe it. The big shift here was, you know, when we even started this thinking to do the benchmark with them, which is, what, like a year ago. Kai, if I get that right. No, a year and a half ago. Yeah, yeah, fair enough, right? When we were starting to even build up to get the design files and what wafer we were going to be testing with them, it was not aimed at high bandwidth flash because that didn't even exist, right? They were looking at it for, like, commodity, you know, data center SSDs. Now with the HBF, it broke their infrastructure, the power supplies, IO pins, et cetera, and parallelism, And now they have a power problem, which we love. Well, we're good at power. So people that have power problems, that's music to our ears. So, yeah.

Larry Shlebina | Analyst, Shlebina Capital

If I recall, you originally said the driver, their motivation was as the 3D NAMs got higher levels of, you know, they're even talking about getting to 400 levels.

Jim Byers | Host, Fondell Wilkinson Investor Relations

Layers, layers, yeah.

Larry Shlebina | Analyst, Shlebina Capital

Layers, yeah. That required more power and exceeded the power in their existing system. That's right. So that they need your high power. So here we are a year and a half later, and so how are they getting by to this point? And don't they need your high power capability?

Gane Erickson | President and Chief Executive Officer

They're having to – they can't test the whole way for one touchdown, as an example. Mm-hmm. But what I described there, which people, if you follow along with that, that was actually referred to as hybrid bonded flash. Same letters, by the way. Hybrid bonded flash was a novel idea that the base substrate layer was logic, done on a logic process, and then you build up just the stack memory, and you do that in a memory process, and then you bond them together. The result of it is that memory stack is a taller building with a smaller footprint, so you get more die per wafer. That's good, right? But the power was much higher. HPF, as in high bandwidth flash, is in some ways architecturally similar, except for it's more power. Because of its speed, it has additional power supplies. and it's taller, it actually is even more of a problem for them, which, you know, I guess if you're a tester guy, the bigger the problem, you know, you have more to solve. But we had to go back and redesign the tester because we were originally aiming it at the other device.

Larry Shlebina | Analyst, Shlebina Capital

I would think they would need more capacity for the enterprise flash part of it before they ever start testing. needing something for HBO. So the Enterprise Flash, I'm wondering, you know, when is something going to happen there? It seems like it's overdue.

Gane Erickson | President and Chief Executive Officer

Yeah, I mean, our goal in this case would be, you know, we had originally hoped to finish the benchmark at the end of last year, okay, so like, you know, we're six months later, and I think as I shared with you, if you read through all of the notes, around March, it was like it felt like you're pushing a rope. Something was going on. If you knew who the company was, it'd be very obvious what was going on. Okay. But that what really happened is they kind of shifted from enterprise focus to HBF. And so that floats some things down in terms of even reviewing our tester. And now, then they came back to us in the summer and we're like, okay, here's the new tester we'd like. So, okay. Maybe that's good. It's, For people that, you know, you're tapping your fingers, it's taking a long time. But that's part of what happened there. But at this point, again, we, you know, we walked up. They're actually – they thought we were just going to take their wafer and stick it into one of, like, our NPs with a manual setup. And we showed them a fully integrated machine. So they walked up, and we put their wafer in a foop, put the foop onto the Sierra automated wafer pack aligner, ran the wafer, it opened up the blade, put the wafer in the wafer pack, put the wafer back in the blade, closed the blade, ran the chest, gave them the results.

Larry Shlebina | Analyst, Shlebina Capital

It's pretty impressive. So you're ready to go for production. So it seems like they're going to need more capacity based on everything that's going on in the memory market.

Gane Erickson | President and Chief Executive Officer

Exactly. And right now they're all flush with margins. How's that? Right? So I agree. You know what? You know, we've been – Larry, you, as people that follow Larry, is our greatest cheerleader, along with me, in memory strategy for us. We are spending money. It is part of, as Chris alludes to, you know, we could be doing better. Well, at these relevant levels, this is – you know, we're not happy with these relevant levels, right? We're not making money at these levels. But we would be making more money. we're spending money. We've got our foot on the gas, and in fact, it's our expectation that we'll increase the R&D spend, particularly in AI, wafer-level burden, a little bit in the package, because we spent a lot of money on that in just this last year for package, getting this new product out, and then the memory system, which will be a blade in our Fox system, basically.

Larry Shlebina | Analyst, Shlebina Capital

It should be, it should pay off. That's So hopefully soon, sooner rather than later.

Gane Erickson | President and Chief Executive Officer

I vote yes, too. As a shareholder, I think it's good money to be spent.

Larry Shlebina | Analyst, Shlebina Capital

That's all I have. Thanks, Gary. Thank you, Larry.

Operator | Conference Operator

Again, if there are any remaining questions, please indicate so by pressing star 1 on your touchtone phone. Okay. I'm showing no further questions in the queue. I would like to turn the call back to management for closing remarks.

Gane Erickson | President and Chief Executive Officer

Thank you, operator. And thank you, everybody. We really appreciate you guys taking the time to spend an hour with us. I think about that exactly again. And we'll keep you guys updated. Stay tuned. We're really excited about this and hope that the orders will come in shortly enough to be able to make this less dramatic as we go forward and set us up for a really strong year heading into next year. So appreciate it. If you are in town, we are in Fremont, California, near Silicon Valley, give us a call, set something up, come by, take a look at the facility. If you haven't seen our tools, they're very impressive, and you can get a feel of the capacity because we have a lot of systems on the manufacturing line right now. So take care, and Happy New Year to everyone.

Operator | Conference Operator

This concludes today's conference, and you may disconnect your lines at this time. Thank you for your participation. jsPDF 3.0.3 D:20261009125758-00'00'

NASDAQ:AEHR Q1 2026 Earnings Call Transcript Generated on 6/8/2026 Operator | Conference Operator: Greetings. Welcome to the Air Test Systems Fiscal 2026 First Quarter Financial Results Conference Call. At this time, all participants are in a listen-only mode. A question-and-answer session will follow the formal presentation. If anyone should require operator assistance during the conference, please press star zero on your telephone keypad. Please note, this conference is being recorded. I will now turn the conference over to your host, Jim Byers of Pondell Wilkinson Investor Relations. You may begin. Host\ Thank you, operator. Good afternoon. Welcome to Airtest Systems' first quarter fiscal 2026 financial results conference call. But with me on today's call are Airtest Systems President and Chief Executive Officer, Gane Erickson, and Chief Financial Officer, Chris Yu. Before I turn the call over to Gane and Chris, I'd like to cover a few quick items. This afternoon, right after market close, Airtest issued a press release announcing its first quarter fiscal 2026 results. That release is available on the company's website at air.com. This call is being broadcast live over the Internet for all interested parties, and the webcast will be archived on the investor relations page of Airtest's website. I'd like to remind everyone that on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. These factors are discussed in the company's most recent periodic and current reports filed with the SEC and are only valid as of this date, and Airtest Systems undertakes no obligation to update the forward-looking statements. And now with that said, I'd like to turn the conference call over to Gane Erickson, President and CEO. Thanks, Jim.

Gane Erickson | President and Chief Executive Officer

Good afternoon, everyone, and welcome to our first quarter fiscal 2026 earnings conference call. I'll begin with an update on the exciting markets areas targeting for semiconductor test and burn-in with an emphasis on how these markets seem to share a common thread of market growth related to the massive expansion of data center infrastructure and AI. After that, Chris will provide a detailed review of our financial performance. And finally, we'll open up the floor for your questions. Although we started with the typical low first quarter revenue consistent with the last few years, and actually higher on both top and bottom lines in Wall Street analyst consensus, we're pleased with our start to this fiscal year. We had revenue from several market segments and strong momentum in sales and customer engagement, both wafer level and package part test and burn-in of artificial intelligence or AI processors. Again, although we did not provide guidance for the quarter, our first quarter results surpassed analyst consensus estimates for both the top and bottom lines. We saw continued momentum in the qualification and production burden of packaged parts for AI processors, which is fueling sales growth in our new Sonoma ultra-high-power packaged part burden systems and consumables. During the quarter, our lead production customer, a leading hyperscaler, placed multiple follow-on volume production orders for Sonoma systems, requesting shorter lead times to support higher-than-expected volumes as they accelerate the development of their own advanced AI processors. This customer is one of the premier large-scale data center providers and has already outlined plans to expand capacity for this device and introduce new AI processors over the coming year to be tested and burned in on our Sonoma platform at one of the world's leading test houses. We're also collaborating with them on future generations of processors to ensure we can meet their long-term production needs for both package and even wafer-level burn-in. Hyperscalers like Microsoft, Amazon, Google, and Meta are increasingly designing and deploying their own application-specific integrated circuits, or ASICs, for AI processing to meet the unique demands of their massive-scale workloads and gain a competitive advantage. AIR allows customers to perform production burn-in screening, qualification, and reliability testing for GPUs, ai processors cpus and network processors directly in package form our sonoma systems provide what we believe to be the industry's most cost effective solution enabling customers to smoothly move from early reliability testing to full production burn-in and early life failure screening which helps reduce costs improve quality and speed up time to market In the last year, AIR has implemented several enhancements to the Sonoma system to meet qualification and production test and burning requirements across a wide range of AI processor suppliers, test labs, and outsourced assembly and test houses, or OSATs. Major upgrades include increasing power per device to 2,000 watts, boosting parallelism, and adding full automation with a new fully integrated package device handler. Over the last quarter, including a very successful customer open house we held last week at our Fremont, California headquarters, 10 different companies visited AIR to see our next-generation Sonoma system and new features, including a fully automated device handler for completely hands-free operation, which we've installed here at our Fremont facility. Customer feedback regarding these enhancements has been very positive. And we expect these new features to open up new applications and generate additional orders this fiscal year. As I've mentioned before, one of the biggest benefits of our acquisition of in-cal technology one year ago is that it gives us a front row seat to the future needs of many top AI processor customers, providing us with close insight into the burning requirements. As the only company worldwide that offers both proven wafer-level and package-part burn-in systems for qualification and production burn-in of AI processors, AIR is ideally positioned to assist them regardless of their burn-in method. Consequently, we are experiencing increased interest in our Sonoma high-volume production solution for package-level burn-in, and some of these same customers, as well as other AI processor companies, are approaching us to learn about our production wafer-level burn-in capabilities. This past year, we delivered the world's first production wafer-level burn-in systems for AI processors. Importantly, these systems are installed at one of the largest OSATs worldwide, providing a highly visible showcase to other potential AI customers of our proven solution for high volume testing and burn-in of AI processors in wafer form, thereby strengthening our market position. We anticipate follow-on orders from this innovative AI customer as volumes increase. and other AI processor suppliers have already approached us about the feasibility of wafer-level burn-in of their devices. We're also developing a strategic partnership with this world leading OSAT to provide advanced wafer-level test and burn-in solutions for high-performance computing and AI processors. This joint solution, already in operation at their facility, marks a significant milestone for the industry. By combining AIR's technological leadership with this OSAT's global reach, we can provide unique capabilities to the market. This model offers a complete turnkey solution from design to high-volume production, and several customers have already begun discussions to learn more about our high-volume wafer-level test and burn-in solutions for AI processors. This OSAT and AIR have a long history of innovation together, including the first FOX-NP wafer-level burn-in system installed in an OSAT for high-power silicon photonics wafers. Now the world's first wafer-level test and burn-in of HPC AI products using AIR's FOX-XP systems. And they're also one of the largest installed bases of AIR's Sonoma system for high-power AI and high-performance computing processors. Additionally, this last quarter, we launched an evaluation program with a top-tier AI processor supplier for production wafer-level testing burn-in for one of their high-volume processors. This paid evaluation, which includes a custom high-power wafer pack and the development of a production wafer-level burn-in test program, will feature a comprehensive characterization and correlation plan to validate AIR's Fox XP production systems for wafer-level burden and functional testing of one of this supplier's high-performance, high-power processors on 300-millimeter wafers. We believe this represents a significant step toward adopting wafer-level burden as an alternative to later-stage burden and into future generations of their products. Our Fox XP multi-wafer test and burn-in system is the only production-proven solution for full wafer-level test and burn-in of high-power devices such as AI processors, silicon carbide, and gallium nitride power semiconductors, and silicon photonics integrated circuits. Beyond AI processors, we're seeing signs of increasing demand in other segments we serve, including silicon photonics, hard disk drives, gallium nitride, and silicon carbide semiconductors. We're experiencing ongoing growth in the silicon photonics market driven by the adoption of optical chip-to-chip communication and optical network switching. This quarter, we upgraded another one of our major silicon photonics customers, FoxXPs, to the new higher power configuration, doubling their device test parallelism with up to 3.5 kilowatts of power per wafer in a nine wafer configuration. This latest system shipment includes our fully integrated and automated wafer pack aligner configured for single touchdown test and burning of all devices on their 300-millimeter wafers. We anticipate additional orders and shipments this fiscal year to support their production capacity needs for their optical I.O. silicon photonics integrated circuits. In hard disk drives, AI-driven applications are generating unprecedented amounts of data, creating ever-increasing demand for data storage and driving new read-write technologies for higher-density drives, particularly for data center applications. We're ramping and have shipped multiple Fox CP wafer-level testing burn-in systems integrated with the high-power wafer probe and unique wafer pack high-power contactors to a world-leading supplier of hard disk drives to meet the test, burn-in, and stabilization needs of a new device used in their next-generation read-write heads. This customer is one of the top suppliers of hard disk drives worldwide and has indicated they're planning additional purchases in the near term as this product line grows. Gallium nitride devices are increasingly used for data center power efficiency, solar energy, automotive systems, and electrical infrastructure. Gallium nitride offers a much broader application range than silicon carbide and is set for significant growth in the next decade. Our lead production customer is a leading automotive semiconductor supplier and a key player in the GaN power semiconductor market. And we have multiple new engagements with other potential GaN customers in progress. We're currently in design and development of a large number of wafer packs for new device designs targeted for high volume manufacturing on our Fox XP systems. Although silicon carbide growth is expected to be weighted toward the second half of the year, we continue to see opportunities for upgrades, wafer packs, and capacity expansion as that market recovers. Demand for silicon carbide remains heavily driven by battery electric vehicles, but silicon carbide devices are also gaining traction in other markets, including power infrastructure, solar, and various industrial applications. Late in last fiscal year, we shipped our first 18 wafer high voltage Fox XP system, extending beyond our previous nine wafer capability to test and burden 100% of the EV inverter devices on six or eight inch wafers in a single path with up to plus or minus 2000 volt test and stress conditions at high temperature. We believe we're well positioned in this market with a large customer base and industry leading solutions for wafer level burden. I also want to give a quick update on the flash memory wafer level burden benchmark we've discussed earlier. This benchmark is ongoing, and we've now begun testing with our new fine-pitch wafer pack that can meet the finer pitches and higher pin count costs more cost-effectively for flash memory, but also can be applicable for DRAM and even AI processors if they require fine-pitch wafer probing. This is the first wafer pack full wafer contactor demonstrating this capability. The benchmark has gone slower than expected with some challenges with the test system bring-up, but appears to show positive results of the new wafer pack, our ability to do an 18-wafer test cell, and using our full automated wafer handler and wafer pack aligner for the 300-millimeter NAND flash wafers. Interestingly, the market for NAND flash is in a state of flux. with earlier announced transition to hybrid bonding technologies for higher-density NAND flash on 300-millimeter wafers, driving new requirements for higher parallelism and higher power, to now a push for high-bandwidth flash, or HBF, which drives very different requirements in terms of test system capabilities. This is exciting news for AIR, as both are driving power requirements up substantially, which is right in our wheelhouse. High-bandwidth flash, or HPF, is an emerging technology developed by two of the flash market leaders and aims to provide a massive capacity memory tier for AI workloads by combining the DRAM high-bandwidth memory, or HBM-like packaging, with 3D NAND flash. This innovation is said to offer 8 to 16 times the capacity of HBM DRAM at a similar cost. delivering comparable bandwidth to dramatically accelerate AI inference and process larger models more efficiently while using less power than traditional DRAM. We're working with one of these lead customers on the now newer tester requirements to provide them with a proposal to meet even these newer, higher performance and higher power requirements within our Fox XP 18 wafer test and burn-in system infrastructure. We expect to have yet another update out at next quarter's earnings call. The rapid advancement of generative artificial intelligence and the accelerating electrification of transportation and global infrastructure represent two of the most significant macro trends impacting the semiconductor industry today. These transformative forces are driving enormous growth in semiconductor demand while fundamentally increasing the performance, reliability, safety, and security requirements of these devices across computing and data infrastructure, telecommunications networks, hard disk drive and solid state storage solutions, electric vehicles, charging systems, and renewable energy generation. As these applications operate at ever higher power levels and in increasingly mission-critical environments, the need for comprehensive tests in burn-in has become more essential than ever. Semiconductor manufacturers are turning to advanced wafer-level and package-level burn-in systems to screen for early life failures, validate long-term reliability, and ensure consistent performance under extreme electrical and thermal stress. This growing emphasis on reliability testing reflects a fundamental shift in the industry. from simply achieving functionality to guaranteeing dependable operation throughout a product's lifetime, a requirement that continues to expand alongside the scale and complexity of next-generation semiconductor devices. To conclude, we're excited about the year ahead and believe nearly all of our served markets will see order growth in the fiscal year, with silicon carbide growth expected to strengthen further into fiscal 2027. Although we remain cautious due to ongoing tariff-related uncertainty and are not yet reinstating formal guidance, we're confident in the broad-based growth opportunities ahead across AI and our other markets. With that, let me turn it over to Chris, and then we'll open up the lines for questions.

Chris Yu | Chief Financial Officer

Thank you, Gabe, and good afternoon, everyone. Looking at our Q1 performance results, exceeded analysts' expectations for both revenue and profit. First quarter revenue was $11 million, a $16 million decrease from $13.1 million in the same period last year. It is important to note that last year Q1 benefited from a very strong consumables revenue quarter, which makes direct comparisons challenging. This quarter's revenue was primarily driven by demand for our FOX CP and XP products. In Q1, we shipped multiple Fox CP single wafer production tests and burning systems, featuring an integrated high-power wafer probe for new high-volume application involving burning and stabilization of new devices for our lead customer in the hard disk drive industry. Contacted revenues, which include wafer packs for wafer-level burning business and BIMs and BIPs for our packaged part burning business, totaled $2.6 million and made up 24% of our total revenue in the first quarter, significantly lower than $12.1 million or 92% of the previous year's first quarter revenue. As we have discussed in the past, this consumable business is ongoing even when customers are not purchasing capital equipment for expansion. We feel that this revenue will continue to grow both in terms of absolute value but also as a percentage of our overall revenue over time. Non-gap gross margin for the first quarter was 37.5%, down from the 54.7% year-over-year. The decline in non-gap gross margin was mainly due to lower sales volume and a less favorable product mix compared to a previous year, which included a higher volume of higher margin wafer packs. Also, our product ship this quarter included lower margin probers and an automated aligner. both manufactured by third parties and sold as part of our overall product offerings. Non-GAAP operating expenses in the first quarter were $5.9 million, an 8% increase from $4.5 million built in last year. Our operating expenses increased due to high research and development expenses for our ongoing project, and we continue to invest resources and efforts to support AI engineering initiatives and the memory project. As we previously announced, We successfully closed the in-cow facility on May 30, 2025, and completed the consolidation of personnel and manufacturing into a three-month facility at the end of fiscal year 2025. In connection with the facility consolidation, we eliminated a small number of headcount due to redundancy in our global supply chain and incurred a one-time restructuring charge of $219,000 in our fiscal first quarter. In the first fiscal quarter of 2026, we received $1.3 million of employee retention credit from the press for eligible businesses affected by the COVID-19 pandemic. We reported this cash credit minus the professional fee to process the refund in other income on our income statement. In Q1, we recorded an income tax benefit of $0.8 million and a productive tax rate of 26.5%. Noncadent income for the first quarter, which includes the impact of stock-based compensation, action-related investment and return charges, was $22 million, or $0.01 per bill of the share, compared to $2.3 million, or $0.07 per bill of the share, first quarter of fiscal 24-5. The consensus on the income for the first quarter of fiscal 24-5 was even. Our patent lock at the end of the year was $15.5 million. With $2 million in bookings received in the first five weeks of the second quarter of fiscal year 2026, our effective ad lock now totals $17.5 million. Turning to our cash flows and balance sheet. During fiscal year, we used $0.3 million in operating cash flows. We ended the quarter with $24.7 million in cash, cash equivalents and restricted cash, compared to 26.5 million at the end of Q4, mainly due to the final 1.4 million payment for facility renovation. In total, we have spent 6.3 million on remodeling our manufacturing facility. With the renovation now complete, we have significantly upgraded our manufacturing floor, customer and application test labs, and clean room space for wafer pack, full wafer contactors. Improvements increase our power and water cooling capacity enabling us to manufacture all of our FoxWave-level burning products and packaged part burning products, including Sonoma, Tahoe, and Backhoe products on a single floor. We are very excited about this renovation as it was specifically designed to enable us to manufacture more high-power systems for AI configuration. We believe investment in this facility renovation has increased our overall manufacturing capacity by at least five times, depending on the current product configuration and we are more ready than ever to support the growth of our customers. We celebrated these upgrades with a customer open house that was well attended and received very positively. Over the past quarter, we hosted many package-targeting, buffer-level running customers who had the opportunity to see our expanded capabilities firsthand. Importantly, we do not expect and anticipate additional capital expenditures for facility expansion in the near future. We have no doubt and continue to invest our excess cash in money market funds. As Kay mentioned, we started the year by withholding formal guidance due to the ongoing tariff related uncertainty. Since we remain cautious, we'll continue with that approach for now. However, looking ahead, we're confident in our base growth opportunities across AI and our other markets. Lastly, look at the investor relations calendar. EdTech will meet with investors at the 17th annual CEO Summit in Phoenix tomorrow, Tuesday, October 7th. This following month, we will participate in the Big Hal on the 16th annual Alpha Conference in New York on Tuesday, November 18th. And on Tuesday, December 16th, we will return to New York City to attend the NYC CEO Summit. We hope to see some of the EdTech conferences. This concludes our prepared remarks. We're now ready to take your questions. Operator, please go ahead.

Operator | Conference Operator

Thank you. At this time, we'll be conducting our question and answer session. If you would like to ask a question, please press the star 1 on your telephone keypad. Confirmation tone will indicate your lives in the question you give. You may press star two if you would like to remove your action from the give. For participants using secret equipment, it may be necessary to pick up their handset before pressing the stop keys. One moment, please, while we poll for questions. Once again, please press star one if you have a question or a comment. Please continue to hold while we adjust some sound tech issues.

One moment. Operator | Conference Operator

Thank you for standing by. This is the operator once again. Christian Schwab, your line is live.

Please go ahead. Great. Christian Schwab | Analyst

That sounds like a much better connection. So, Gain, you know, as we kind of get into the second half of the year and kind of these more open-ended growth opportunities in AI that you've talked about in particular, you know, when do you think we'll see a material improvement in bookings to drive revenue down the road?

Gane Erickson | President and Chief Executive Officer

Well, that sounds an awful lot like guidance again here, but so what we believe and what we've tried to communicate in our previous calls as well is that, you know, our lead, our first AI way for low-earning production customer, we anticipate that they will need additional capacity that would be both bookings and revenue for this year, and That could be more than last year, and we won't put a top on that. So, you know, the question is timing of that. We're not sitting on an order. We didn't get it yet and just put it in our pocket. But as that order comes in, we typically will announce those within, you know, a couple of business days or so. What we are seeing is additional wafer-level customer engagements. It's pretty interesting that kind of span from, processors and asics and I'm sorry okay hold on that was a person can you hear me okay oh wow all right I can hear you again okay All right. So I'll assume that Christian is on mute or something that he can hear me as well. So we're seeing it across several different groups from hyperscalers, AI processors, kind of across the board. And it's interesting. We had direct people that have come in saying that's what they're interested in. We have people that are talking to us about Sonoma because their current customer is already doing qualifications and are looking to do burn-in for the first time and are looking at either package and also now exploring the wafer-level side of things. So these generally do take some time, and, you know, so I would – Probably guess these tend to be more second half, this being the second fiscal quarter of fiscal 26 for us. But, you know, at this point, we're just scrambling as fast as we can to address all the requests and requirements and keeping our head down to focus on them. On the package part, same thing, both additional quals and additional processes that are being put on our system and its enhancements to the Sonoma. as well as we've got customer interest to do additional production customers, you know, with and without the fully automated integration of the pick-and-place handler that bolts right onto the front of Sonoma. So I think it's ongoing and very interesting, and we're just really happy to have this number of engaged and active customers. Operator, can you hear us?

Operator | Conference Operator

Yes, I can hear you. And are you ready for the next question?

Gane Erickson | President and Chief Executive Officer

Yeah. Christian, do you have any other questions?

Operator | Conference Operator

It seems a little rough this time. We have a question coming from Christian Schwab. Christian, your line is live. Go ahead, please.

Christian Schwab | Analyst

Sorry about that, Gane. I was telling you I could hear you, but it wasn't working either. So we have, you know, a few customers here currently. You talked about, you know, a bunch of more customers coming in there. As we look to the end of your fiscal year, do you have a target number of customers that you think you'll be in the process of shipping to by then or shipping to fairly shortly afterwards?

Gane Erickson | President and Chief Executive Officer

That's a good question in terms of targets. Actually, we do have some discrete quantity targets. In fact, some of the KBOs, which are the bonus structures for our officers, are based upon not only numbers but specific targeted AI customers. We're really given a lot of insight, but I would say in plural for additional package part and also for wafer level. At this point, we're not really limiting ourselves, but we're just trying to be cautious about oversetting expectations either in terms of the timeline of it. One of the things that was interesting that really came to fruition, and I apologize if I said this before on the last call, is I'm starting to also understand a couple of things going on. One of them that was kind of new is there are many of the ASIC suppliers in particular, and there's some evidence within the you know, the GPU or just the processor suppliers themselves, they don't do a production burn-in like you think about it, like using one of our tools. They're doing it at system level, like as in the rack. So these processors are getting all the way to the end, and then they're simply running them in rack form, sometimes at elevated temperatures and sometimes not, to try and get, you know, the first seven days of failures out of them, which is so inefficient and uses a ton of power. And, you know, there's only so many processors per rack, if you will. And so I was sort of surprised at some of this. You know, some of the test vectors that we're getting from customers are not, this is on a production tool today. This is just an HTAL, which is like a qualification vector instead of a production vector. And that's because they weren't doing production yet. so you know you know you're really at the leading edge of this um but one thing is really clear from the data we've seen so far the devices are failing we do see the failures in the burn-in so they're absolutely able to screen them using our tools at wafer and production and so you know that creates the leading edge of this market and why we're so excited about it's really easy i mean obviously Every single call you get on, your CEOs are talking about how they're using AI one way or the other. But this is really happening to us. I mean, it was 40% of our business last year from zero. We think it's going to grow, both package and wafer level, this year. And, you know, we're still seeing the other businesses grow as well. So we're really glad to have gotten the facility upgrade, you know, behind us. There's a lot of work to get that there. Now we have the capacity to be able to ship so many more systems, particularly the high-power ones. And if you come on our floor right now, you'll see AI wafer-level burning systems right next to Sonoma systems being built today. So, you know, I think that we believe that we have the opportunity to capture, you know, multiple customers in both package and wafer levels.

Christian Schwab | Analyst

And then my last question, Gain, is, you know, last call you were quite enthusiastic about the TAM for, you know, AI-driven products for you to be three to five times bigger than silicon carbide. And is there a timeframe that we should be thinking about that, you know, becomes evident? Again, I kind of asked it on the backlog question, but I'll ask it again more directly. You know, are we going to see material orders from, you know, one or two customers, you know, this fiscal year? Or is that something that it's just too early to know? But, yeah, you can feel confident it's going to come. How should we be thinking about that?

Gane Erickson | President and Chief Executive Officer

I feel the latter is the easy out to say that I'm confident they'll come. I think timing it can both be, you know, a lot more guidance than we're providing right now. But there's also just some of these evaluations as we prove it, the customers can actually start contemplating how many and when they would want to install them. You know, the new evaluation, I think we already alluded to it, it's for a processor that is expected to go into volume production at the end of next year or in the second half of next year. So, you know, tools would be needed to be going in in that timeline. So, you know, if you just – we do fiscal years through, in this case, fiscal 26 is through May of 26. If you talk about calendar 26 – there's a lot of opportunities in play that need to play out that would be production for both wafer level as well as package. So it's not that far away. I mean, even something that seems like is a one year away in our space, there's a lot of work that needs to be done to actually ramp a customer to be one year out. And so, um, we'll keep, uh, you know, we'll keep focused on this thing as we get a little closer, we'd hope to give you answers. Um, To be candid, this will probably feel like, you know, you'll hear enthusiasm and we think we're winning and, you know, the customer has gotten good results. Those will be early indicators. And then, you know, we're going to surprise everyone with a large production order, not unlike what happened with the first wafer level system, except for some of these customers are just significantly bigger.

Christian Schwab | Analyst

Great. Thank you.

No other questions. Thank you. Operator | Conference Operator

Thanks, Christian. Thank you. Your next question is coming from Jed Dorsheimer. Jed, your line is live.

Please go ahead. Mark Shooter | Analyst

Hey, Gabe. You have Mark Shooter on for Jed Dorsheimer. Hey, Mark. Congrats on the success for this quarter and the announcements for the AI customers, and that's great. Can you give us a little color? How should we think about the engagement in the qualification cycle for these customers? Do you need a new product cycle to occur? Do you need to slide in between Blackwell and Rubin? And if you can give us a little bit of what's it like in the room with the customers. Is the tenor of these as risk aversion, or is the overwhelming demand spur some willingness to try a new equipment like AIR?

Gane Erickson | President and Chief Executive Officer

Oh, that's actually, there's a lot in there. Those are good ones. All right, so let me talk about sort of the qualification process. So, so far in the engagements that we've had so far, we don't need a new product. So we are doing some things depending on the pitch of their probe cards, which we call our wafer packs. We may need to do some things specifically for that. We have some design for testability features that we have been touting to our customer base that allow them very short lead time, high volume, low cost wafer packs. We can also supply them at higher cost and a little bit longer lead time. if they don't hit those DFT targets. We've got some of both. And so, like, one of the engagements, we made a conversation related to them about their pitch of their devices. And we're like, wow, you know, you happen to choose a pitch on these so many pins. That's driving the cost of your wafer pack-up. And they're like, well, why didn't you tell me before? And they kind of joke because they hadn't talked to us before. And they're like, well, this will be no problem to cut in for our next generation, but we're just going to have to live with it on the current one. so you know they're they're engaged with us in kind of a roll up the sleeves working the qualification in some cases is just validating that we can do the same type of dft and power delivery as we've done with the other processors on their devices i think customers i get it they're they're kind of like it's hard to imagine that we can really pull this off you know if they haven't seen it with their own eyes and so we're just showing it and demonstrating it to them somewhat like what we ended up doing with the first silicon carbide customers. And then at some point, people get it. Now, one thing that also seems to be going on is, you know, these are pretty visible. I already said that these systems are sitting at an OSAT, and there aren't that many of them, okay? So especially not that many of the biggest, right? There's a lot of people out there that are aware of the success of this. And even though the analysts and all are still trying to figure out everything, there's a lot of people that have pretty intimate knowledge and seem to know what's happening. And so they're like, can you do – can I do it that way too? So they're leaning in. So it's a little less of, you know, complete disbelief, can you do it, but more of can you prove it for me. Now, from a timing perspective, it's, you know, just typical of the industry – Normally, when people are buying test equipment, like semiconductor test equipment like ours, you do it at some disconnect. Either you're putting a new fab in, if you're an IBM, or it's with some new product. Or if just simply the volume is growing so fast that you want to buy a tool that has more output per dollar or so. So in this case, you know, outside of one supplier, everybody is using TSMC today, and eventually Tesla will be using the Samsung stuff. But it's not like there's a new fab, although there are new fabs coming online. People are just getting access to those TSMC wafers and then want to be able to test them. And they either do it in a package for Vernon on something like Sonoma or a system-level test or off-lead all the way back at the RAC. So customers are engaging because they need to buy capacity for these new products and for new things coming out. So it is a fair way of looking at it to look at the intercept between product A to product B. That's at least what's been communicated to us with this latest one we just announced. And similarly, our first customer intercepted us with their transition to a newer device. We announced that a year ago. So that's pretty typical, and sometimes that's the gating item of their timing, and sometimes that's fast or slow, but it's sort of you need to time it with that. Just the tenor, the tone. So, you know, if you guys, people that have followed us understand that, you know, our value proposition, our pitch, if you will, is that semiconductors are growing, you know, extremely high. So, you know, within... It took 40 years to get to 500 billion. It's going to take less than 10 to double that. Much of that is driven by either directly AI or all of the pieces surrounding all of the explosive data center growth. What's happening is these devices are not more reliable for multiple reasons. The smaller and smaller geometries and the fact that they're putting multiple devices into one package because they can't make the devices any bigger are driving the requirements for reliability and burn-in test. And if you look at the roadmaps from all of the players, every single one of them, from all of the NVIDIA products to everyone else, from the ASIC suppliers, all of their products going forward are pulling multiple compute processors to make it generic in a single package, along with many, many stacks of HBM and ultimately optical I.O. chipsets. They put these on these complex advanced packaging substrates, and they're extremely expensive. And I always remind people, the reason you burn them in is because they fail. And when they fail, you take out all the other devices. So the value proposition, if someone could ever do wafer-level burn-in, is overwhelming because the cost of the wafer-level burn-in is cheaper than the yield loss. I actually alluded to it in my prepared remarks that our lead customer for Package Part Burn-In is going to do a couple few generations in Package Part and then wants to switch to wafer level. So, you know, what are they going to do with all those Sonomas? It doesn't matter. The yield advantage of moving it to wafer level pays for it all. So, you know, that's a thing that's a macro trend heading our way. And it's not just AI. It happened to us in the silicon carbide side of things. We see it in stacked memories in both DRAM and flash. We see it in other complex devices in GAN that are going to automotive that are mixing different devices together and why it's driving for wafer level. And these large trends are good for both reliability as a tide that's rising for all, and really good for us, but also for our unique products, particularly the Sonoma and the high-power wafer-level burning systems we have with our Fox products.

Mark Shooter | Analyst

Dane, all that color is very helpful. Thank you. To dig in a bit around that last part of the Sonoma versus the Fox products, what's the gating factor of why customers are going first with the Sonoma and not right to wafer-level burning? What needs to be proven out? for wafer-level burn-in for those customers? And how – I'm assuming there's a sales cycle there of you'd like to start with Sonoma and then push people to wafer-level burn-in. So how does that transition go?

Gane Erickson | President and Chief Executive Officer

Yeah, you know, the way we look at it is we say we're just neutral. If you want to do package part or you want to do wafer-level, we love you both, okay? Okay. it's not easy to just go, you know, talk someone out or whatever it is they're used to. So in this case, we don't have to. We just say, listen, we think we make the best machine for qualification reliability of your complex packages with Sonoma. They can test all the processors, HBM, and all the chipsets inside of it in a single path during your quals. If you want, we'll do it in production as well, and we're now adding automation to it. But if you'd like to kind of go to the next step, you could take the high-failing devices out of there and do a wafer-level burn-in of them before you put them in those packages. And our data would suggest you don't need to burn them in again. But, you know, if you still need a little burn-in, that may be fine, but you don't want to have the massive yield loss. Some of these processors have four and eight CPU chips in them, right, compute chips, and have another, you know, six or eight HBM stacks on it. Just the co-loss substrate is extremely expensive and rare. And so, you know, it makes sense to go to wafer-level, but, you know, to be candid, one year ago, 12 months ago, we didn't even have the first order. There was not one machine in the world that could do a wafer-level burn-in of an AI processor. None. We're the only ones, and we've now just, you know, And, you know, we're at the front end of this thing. I understand people are sort of in a doubting mode. Let us prove it to them. And for those that are on the call, if you have a processor, you can sit down with us under non-disclosure. We can tell you which exact specific files we need, and we can do a paper benchmark and give you an answer within a couple of days. as to the feasibility of your devices. And so far, we have not found one that we haven't been able to test that we've been given that detailed data on. So, I'm sure there are some out there. But for now, we're on a roll.

Mark Shooter | Analyst

Okay.

Operator | Conference Operator

Much appreciated. Thank you. Thank you. Your next question is coming from Bradford Ferguson. Bradford, your line is live.

Please go ahead. Bradford Ferguson | Analyst

Hello, Gane. I'm curious about the cost to wait until you get to the motherboard or the package part or the final part. When we were talking about silicon carbide, you could have 24 or 48 sick devices in one inverter, and then the whole inverter is bad, and maybe that's a $1,000 or $2,000, but the retail price on these NVIDIAs is, what, $40,000?

Gane Erickson | President and Chief Executive Officer

Well, the rumor is they have really high margins, and I'd love it if the customers would give me credit for their sales price. They really only give me credit for their cost, but fair enough. But their cost is significantly higher than any silicon carbide module ever would be. Fair enough. Yeah, I mean, it's, you know, and by the way, to me, the craziest thing is how many people are doing it at the rack level. Like, you're talking about all the way at the computer level side of things and burning it in. And, you know, obviously, a failure there is, you know, a lot more expensive than it would be all the way back at wafer level. So you want to move, in our industry, we refer to shift left. You want it to go as far left in the process as possible because it's way more cost effective. In this case, we have the first two steps in the left side, wafer level and when it's just the module level. Before that module is then put actually into the system level where you'd start to see all of the power supplies and everything else on it, you know, like the GB200 module itself. And then you, certainly before it goes over super micro or $2 or something in some mainframe rack. So, you know, one thing to put in perspective, and I don't think this is the value proposition yet, but it is interesting. We know that people are doing this burn-in at the rack level or the computer level, right? When you're in the computer level, basically what burn-in does is you're basically applying stress condition of, power via voltages or current, and temperature. And what it does is it accelerates the life of the part without killing it. So I can take a device and in 24 hours make it look like it's one year old, and if it hasn't died by then, it's going to last 20 years. There's all kinds of books on it. You can read it, Google it, or something, and you can find out about the basic process of burn-in and why you do it. Thanks. The key here is you want to do it in, you know, 24 hours or four hours or two hours or something along those lines to get the infant mortality rate out so it doesn't shift to the customer or take down your large language model compilation, okay? Now, when you're at system level, you can't run that rack at 125 degrees C. Everything will burn up. In fact, those racks are running cold water through them. they're probably running 30 degrees C temperature maximum. I know of a company that was trying to do some things to try and get an isolation of the GPU or the processors to 60 degrees C, and their burn-in time was measured in days at the system level. That's what they were doing. Now, by moving it to wafer level, we can actually run the devices at a junction temperature at 125 degrees C which is an accelerant that's more than 10x. We can also run the voltages extremely closely to their edge, and we can get the burning times to come down. So when we do that, we're actually applying only power to the processor, not the HBM, not all the inefficiencies everywhere else, not the rack, et cetera, just to the processor, and we can do it for a significantly less amount of time. The long and short of it is I can burn it in to the same level of quality at a fraction of the power. Now, I don't think anyone's going to buy our system because of that per se, although there's some argument for it. But you know what's hard? Getting a permit for a megawatt burn-in floor for your racks. So people may buy our systems because they can actually get the power infrastructure to burn in hundreds of wafers at a time in parallel and in a regular 480-volt, maybe 1,000 or multi-thousand-amp circuit like we have in our building. You wouldn't be able to do that. If you had to burn in a bunch of racks in our building, you wouldn't be able to do it. But I could have 10 systems running with nine wafers apiece and test 100 wafers at a time with the power that I have in my facility, which is not that atypical of a facility – in the Bay Area in Silicon Valley. So there is a value proposition there. In addition to the real cost savings, it might just be feasibility of power.

Bradford Ferguson | Analyst

And so you mentioned the high bandwidth flash. I'm hearing from some systems makers that they're focused on burn-in more. just because of how expensive it is to, you know, scrap the whole motherboard or whatever. Do you have any kind of end to high bandwidth memory, or is it mainly the high bandwidth flash?

Gane Erickson | President and Chief Executive Officer

Yeah, I mean, we talked at kind of our first – our belief was that the engagements and the interest was first on the HP – yeah, on the flash side of things. There is some things – there's discussions on the DRAM side of things. I mean, people are really scrambling to try and solve that through all kinds of mechanisms, and I won't get into all the technological things that we understand. You know, there's very different implications when you talk about Micron, Samsung, and Hynix. and what they do and how they stack their memories and how they test them and burn them in that have, you know, kind of key differentiating features amongst themselves that make tests interesting. We have a pretty good insight to that. I'm certainly not going to talk about it publicly, but that makes that interesting. Bottom line is, you know, high bandwidth memory and then eventually high bandwidth flash needs to be burnt in. and needs to have a cycle and stress to remove that somehow, or it's going to show up as it has been in the processors, in the AI stacks. You know, and that's widely known and understood. And, you know, NVIDIA came out last, what, six months ago, yelled at everybody and said, you need to figure out how to burn these things in before you ship them to me. We're sick and tired of it. So, you know, I'm not creating rumors. Those are widely understood reports. And so right now what we're seeing in the test community is sort of, you know, people overuse, you know, the Wild West, but there's just people scrambling for good ideas on how to address this and running as fast as they can. And, you know, it makes it exciting every day when you show up to work and you've got people that are like, how can, you know, how can you help us? So I love our hand. I love the cards we're dealt right now. I love our position. I love our visibility that we have within. Pretty much all, I think we can now say we have communicated with every single one of the AI players. And, you know, we have a line into them and some thread, either package or wafer level related, that gives us some great insights. And I think we may be completely unique in that realm. So I think the HP app, it looks pretty interesting. Again, you know, that stuff takes time. But more and more things are breaking the infrastructure of tests because of power at wafer level, and that's a good thing for us. We're really good at that. Our system, you know, I just throw out 3.5 kilowatts per wafer, and, you know, most people would not know what that means. That's crazy. I mean, you know, the world has wafer probers, you know, thousands of those installed, that has 300 watts of power capability. If you try to go get a prober that has 1,500 to 2,000 watts, it's a specialized half-a-million-dollar prober. It's what we ship with the CP to the hard disk drive guys. That's one wafer's capacity. Our systems can do 3,500 watts on each of nine wafers in one machine. Nobody can do 3,500 watts on one machine. I'm sorry, on one wafer on one machine. And so people are coming to us because of the thermal capabilities that are unique. Many, if not most of them, are patented around the whole wafer pack concept and the blade where we deliver thermal power without a wafer prober to create uniformity across a 3,000-plus-watt wafer is really awesome. And it's fun to talk about with the technical people. And they're, you know, I'd say that people are quite impressed with what they hear. And so, it's great to rotate people through here. And by the way, they see it. We can show them in operation when they come. This is not a story. I think, you know, the more and more of these things, the rising tide, you know, the better shape we're in. And we're not abandoning our silicon carbide customers that are listening. I know they have ramps. They have opportunities. There's new fabs. There's new capacity coming on. They have new technologies. We're not abandoning the OEMs, the electric vehicle suppliers that we have met with personally and helped them to develop the burden structures and the burden plans that they drive their vendors towards. We're fully committed to those guys, and we'll be there as they rep, and we have more capacity than we ever had to be able to address their needs at a lower price point. I think we got that covered. We're not pivoting the company. We're just adding to it with this AI stuff.

Bradford Ferguson | Analyst

On silicon carbide, this will be my last one. Thank you for your generosity. On CIMI, I think one reason for their success is how aggressively they adopted air test systems, Fox XP systems. And we have a pretty large bankruptcy that happened with one of their competitors. Is there some kind of risk for the other chip makers if they don't take if they don't take burn-in more seriously, that it could spell issues for them?

Gane Erickson | President and Chief Executive Officer

So let me answer it this way. I have been invited to be a keynote speaker. I've spoken at multiple technical conferences around the world, and Silicon Carbide and Galvanitride conferences. I've sat on several panels, and I have been very almost emotional in some of those discussions. because we have seen the test and burden data of more, almost all of the wafers in the world, okay? That's pretty bold, okay? Certainly more than anyone by far, okay? Everybody would like to think that they are special and their devices are just so much better than everybody else's. The reality is that these devices fail immediately. during burn-in that represent the actual duty cycle or what's called the mission profile of electric vehicles. What that means is if you do not burn them in, it is our belief in the data that we have, they will fail during the life of the car, period. We've talked about that. I think I've quoted several times. Whatever you do, it is my opinion, never buy an electric vehicle that didn't have burn-in for something in the six to 18 hours, depending on the size of the engine and things like that. And there are OEM suppliers that have the data. They have failed customers who try to qualify without doing an extensive burn-in and kick them out. And there have been very large suppliers that have lost in the industry because of quality and reliability. So my call to arms for everybody is there's no reason – not to do wafer level burn-in or package part if, you know, if you don't want to go with us. But whatever you do, don't skip it. And we now with our 18-wafer system, even at high voltage, okay, so we've extended the capability with more capabilities. The cost of test at high voltage on our system with a capital depreciation of five years, et cetera, is about .5 cents per die today. on an 8-inch silicon carbide inverter wafer per hour. Per hour. You can do 24 hours of burn-in for 12 cents a die. And we have been very clear with that to all the OEMs, and they understand it. And so they drive for a level of quality that they can measure directly on our tools from their suppliers. And I think there is a difference between the people that have adopted a high level of quality and reliability in their market share. And all I'll say is, you know, I think On Semiconductor has done an incredible job. You know, in 2019, I think the year before, they had done $10 million in silicon carbide, and they're now, you know, kind of neck and neck for market leadership, and they have won well more than their fair share of the industry across the, and I'm just repeating what they have said, across Europe, the U.S., Japan, and even China. They have done really, really well, and I commend them for that.

Operator | Conference Operator

Thank you. Your next question is coming from Larry Chapina. Larry, your line is live.

Please go ahead. Larry Chapina | Analyst

Hi, Gane. The news today on the AMD – hook up with OpenAI. Does that accelerate your evaluation process that you have with that second process, or does that put more pressure on getting that done?

Gane Erickson | President and Chief Executive Officer

We have not talked to the level of detail to determine who it is. We've given enough hints that it's amongst the top, suppliers of ai they it's not one of the asic guys so i i'm going to try and avoid being more specific i will restate we are in conversation with every one of the suppliers and i will then say including those guys okay um so my interpretation of that is you know it honestly just sort of warms my heart to see the different people's commitment to the different types of processors. I mean, without going into whether they are or could or might already be a customer or not, one thing about AMDs, and we've used that, again, not as an endorsement to them. We've used them as one of the examples because their MI325 has eight processor chips in addition to, I think, at least that many HBM stacks plus a chip set. in one substrate if there's anyone that ought to be doing wafer level burning they would be amongst them okay um but you know for example you know right now we provide uh opportunities for our customers uh including the likes of those guys to buy our tools for their their burning requirements for qualifications either themselves or to use it at one of the many test houses that have our systems to use our systems for package pump burn-in for the lowest cost alternative to things like system-level test systems that are being used out there, and if the most advanced process would be to do wafer-level burn-in over time. So, you know, I won't comment on anything more than that. Sorry, Larry. No, sir. You know, I think in general, you know, I think good news for the processor market is generally good for us right now.

Larry Chapina | Analyst

The optical IO opportunity, is that going to involve actually new machines instead of upgrading existing machines? Is that transition going to happen here shortly, or do they have more machines that they're going to?

Gane Erickson | President and Chief Executive Officer

The forecast includes both. So more upgrades and more new machines.

Larry Chapina | Analyst

They've got to be running out of machines to upgrade, don't they?

Gane Erickson | President and Chief Executive Officer

Yeah, but there's also a scenario where they also have a bunch of products on the current machines that haven't gone away. And so, you know, it's sort of, you know, while you're upgrading these systems, they're backwards compatible, so you can still use the old wafer packs and everything on them. But nevertheless, it's both. And then the other thing, and it's subtle, and those that don't know it, so we introduced a couple years ago, a front end to the Fox systems that allow you for fully hands-free operation with a wafer pack aligner. So you can come up to that with FOOPS, in this case with 300 millimeter, with both overhead or AGV, automatic ground vehicles, with an E86 compliant port that allows you to not even come and touch the machine. And the wafers can run around on the fab and they can run a burden cycle and then move on and go to the next step of test.

Larry Chapina | Analyst

And you can upgrade them with the automation as well.

Gane Erickson | President and Chief Executive Officer

Exactly. So we took what we actually took their tools that they had bought in the past with our older wafer pack aligners. And they are now upgrading to the new wafer pack aligner. But instead of it being offline, it's integrated with the system. So you know, that's kind of a that's kind of a good way. That's the advanced way of doing it. And particularly when you think about 300 millimeter fabs of like memory, big AI processors, you know, even the silicon photonics, you kind of want to do it. You know, that's the best way of doing it, full automation. But if they want offline, they can do that too with us.

Larry Chapina | Analyst

On this HPF opportunity, is this a different company other than who you've been working with for two, three and a half?

Gane Erickson | President and Chief Executive Officer

What's that? Same company.

Just evolving requirements. Larry Chapina | Analyst

Okay. Yeah. I mean, do you expect anything to break loose on the original Enterprise Flash application, or is this going to continue on?

Gane Erickson | President and Chief Executive Officer

It kind of feels like this is, let's just say trumping it, but that word means something different these days. It feels like this is such an enormous opportunity to the Flash guys. that it's sort of like, you know, the shiny bright light that may actually be better for us. I'm not sure it's better in terms of near term, like, you know, the opportunity is fast. We'll see. But they could, you know, they could configure a system. The new system configuration is a superset of the old requirements. And so we had already worked on the previous one. and we're working on an updated proposal to show them how they could build blades in our system that could do both their old devices and the new ones. So maybe that will help it be better. I think it is, but, you know, it's always interesting when things change. But the one thing, none of their old tools will work with this HP Flash.

Larry Chapina | Analyst

No, I wouldn't think so.

Gane Erickson | President and Chief Executive Officer

So that's, you know, maybe that's a good thing for us, right?

Larry Chapina | Analyst

All right. That's all I had. I'll see you tomorrow, I guess.

Gane Erickson | President and Chief Executive Officer

Thanks, Larry. And Larry's just alluding to, we're going to be over, we're here at Semicon in Arizona, Semicon West, and there's this CEO summit that Chris alluded to. Although, Chris, I don't know if you knew this, you were breaking up. And it sounds like we had operator problems with the operator connection. The new one has been a lot better. So sorry about that to folks that are on the line. Operator, any other questions?

Operator | Conference Operator

I'm showing there are no further questions in queue at this time, and I'd now like to hand the floor back to management for closing remarks.

Gane Erickson | President and Chief Executive Officer

Okay, thank you. You know, I meant to try and work this in. I'm going to do one little other thing. So the other one we haven't talked about, and maybe next call we'll spend a little bit more time on, we did a deep dive last time on the AI side of things. This time was more of an update on things. But there's other products that we have, and one of the things I want to highlight is the activities that we have within package part outside of AI. It turns out that with the NCAL acquisition, they have a low-power and a medium-power system called Echo and Tahoe that we've been shipping a lot of systems kind of quietly in the background. And recently we've had some customers, I think, egged on by some competitors that were saying, oh, there isn't even doing that stuff anymore, and that's just not true. These products are beloved by the customers for their software, their flexibility, and they did a really good job. In fact, those products were the products that honestly took air out of the Pacify burning market because the products were just better than ours. And, you know, we still love those. And if you come on our floor, you'll see them being built right alongside of the Sonoma systems and our Fox systems as well. So just a message out to our customers, we still love you. We're still committed to supporting those products, and we have way more manufacturing capacity than Intel ever did. So don't be timid. We're happy to continue to ship as we have, and we'll give the investors a little bit more insight on some of the systems we're building right now, some of the interesting applications that they're going into. that are also another part of this overall shift of all semiconductors needing more and more reliability tests from qualifications to burn-in. So with that, I thank everybody, and we appreciate your time. And putting up with a little bit of the stuff going on with the call, we'll work on that and make sure we do better next time. And we appreciate it, too. Thank you, now.

Operator | Conference Operator

Goodbye. Thank you. This does conclude today's conference call. You may disconnect your phone lines at this time and have a wonderful day. Thank you once again for your participation. jsPDF 3.0.3 D:20260608224405-00'00'

NASDAQ:AEHR Q4 2025 Earnings Call Transcript Generated on 6/8/2026 Operator | Conference Operator: Greetings. Welcome to the Aehr Test Systems Fiscal 2025 Fourth Quarter and Full Year Conference Call. At this time, all participants are in a listen-only mode. A question and answer session will follow the formal presentation. If anyone should require operator assistance during the conference, please press star zero on your telephone keypad. Please note, this conference is being recorded. I will now turn the conference over to your host, Jim Byers of Pondell Wilkinson Investor Relations.

You may begin. Jim Byers | Investor Relations Host, Pondell Wilkinson

Systems Fiscal 2025 Fourth Quarter and Full-Year Financial Results Conference Call. On today's call are Aehr Test Systems President and CEO, Gane Erickson, and CFO, Chris Siu. Before I turn the call over to Gane and Chris, I'd like to cover a few quick items. This afternoon, right after market close, Aehr Test issued a press release announcing its Fiscal 2025 Fourth Quarter and Full-Year Results. That release is available on the company's website at aehr.com. This call is being broadcast live over the Internet for all interested parties, and the webcast will be archived on the investor relations page of the company's website. I'd like to remind everyone that on today's call, management will be making forward-looking statements that are based on current information and estimates and are subject to a number of risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements. These factors are discussed in the company's most recent periodic and current reports filed with the SEC. These forward-looking statements are only valid as of this date, and Aehr Test Systems undertakes no obligation to update the forward-looking statements. And with that, I'd like to turn the conference call over to Gane Erickson, President and CEO.

Gayn Erickson | President and CEO, Aehr Test Systems

Thanks, Jim. Good afternoon, everyone. Thank you for joining us on Aehr Test Systems' fiscal 25 fourth quarter full-year earnings conference call. Before we begin, I'd like to thank our customers, employees, and partners for their dedication throughout this transformative year of execution. expansion and strategic diversification for Aehr in fiscal 2025. I'll start with an update on the primary markets Aehr is targeting for semiconductor testing in Vernon, as well as the significant progress we've made in this year in new markets. After that, Chris will give a detailed review of our financial performance. And finally, we'll open up the floor to your questions. I just want to also point out that we've had a lot of inbound questions related to the AI market and what that means to air test. So we'll be doing a deep dive as we have often done in other markets today to hopefully let people really understand the implications and how air is playing in that. This past year, we made significant progress expanding into additional key markets for our semiconductor burn-in solutions, including artificial intelligence processors, gallium nitride power semiconductors, data storage devices, silicon photonics integrated circuits, and flash memory. This diversification of our markets and customers is significant given our revenue concentration in silicon carbide devices used in electric vehicles during our previous fiscal year. Silicon carbide wafer-level burn-in accounted for over 90% of our revenue in fiscal 24, whereas it made up less than 40% of our revenue this fiscal 25. In contrast, the burn-in of artificial intelligent processors represented 0% of our revenue last year, but this year accounted for over 35% of our revenue. And we had three companies representing over 10% of Aehr's revenue this year, with two of these representing new markets and customers. As we grow, we expect that expanding into new markets and customers will not only allow us to grow faster, but also do so sustainably. The main growth areas for us in markets beyond silicon carbide included production wafer-level burn-in of AI processors, package part burn-in for qualification and ongoing process monitoring of AI processors, and also production package part burn-in and screening of those AI processors. We also had wafer-level burn-in of gallium nitride semiconductors and silicon photonics integrated circuits wafer-level burn-in. And while there was only a small amount of revenue in the fiscal year from wafer-level burn-in of hard disk drive components, About 10% of our order bookings for the fiscal year came from this new market, all of which we expect to ship and generate revenue from during this fiscal year, now 26. Looking back on the year, we're excited about the significant progress we've made with the key initiatives to expand these total addressable markets, diversify our customer base, and develop new products, capabilities, and capacity, all aimed at driving revenue growth and increased profitability. One of our biggest milestones this past year and what we believe is currently the most important for future revenue growth was the completion of development, validation, shipment, and customer acceptance of the first-ever wafer-level burn-in system for AI processors. Delivering the industry's first wafer-level burn-in solution for the AI processor market, the only one of its kind in the world, marks a major technological and commercial milestone and significantly expands the market potential for our Fox XP wafer-level test and burn-in systems. Our new high-power Fox XP wafer-level burn-in system can test up to nine 300-millimeter AI processor wafers at the same time. This achievement is a result of extensive development efforts over the last decade in test technology, particularly in delivering massive amounts of power and current to a wafer during test, wafer contacting technology, and thermal control and heat removal as well as wafer handling and automation. When our lead AI customer first approached us about testing and burning their AI processors at the wafer level, it wasn't clear if this was even technically feasible, even with our proprietary and unique technology. We leveraged the technical capabilities we had developed over the years, along with the technology and design for test methods used in state-of-the-art wafer foundries to meet these unique test and burn and stress requirements. This included applying thousands of amps of current to a single wafer to test devices capable of withstanding thousands of watts, and then not only doing it with one wafer, but nine wafers simultaneously. We also expanded our proprietary wafer pack contactor to support very high current testing capabilities, including the ability to adapt the thermals to create uniformity across a wafer that, by definition, is not otherwise uniform during burning conditions. With Aehr demonstrating and now shipping the first-ever solution for wafer-level burn-in of AI processors in partnership with this customer's outsourced assembly and test partner, one of the largest OSATs worldwide, we have proven that our high-power Fox XP multi-wafer systems and proprietary wafer pack contactors are a viable solution for high-volume testing and burn-in of AI processors in wafer form. This approach eliminates the need to burn in these devices in package or system form, where test costs and yield losses due to failing devices during burn-in are significantly higher and have a much more significant impact on overall manufacturing yield. Many AI processor companies are talking about billions of dollars of devices a year, with the largest AI processor company in the world shipping over $100 billion worth of processors in the data center applications this year alone. Even a 0.1% increase in yield by shifting the burn-in of devices from the system or heterogeneous package level to wafer level is very significant. Today, burn-in related screening and early life failures at the system or package level causes the entire package or system to be discarded due to the inability to repair these devices at this stage. Moving this screen to wafer level allows devices that would otherwise fail during screening at the package or system level to be removed before they're packaged, or worse, put into the system level. We believe using wafer level burn-in will result in savings in manufacturing costs, increases in revenues associated with the limited supply of these devices, and a reduction in field-related failures and warranty costs, as you can afford to put more screens in place or burn in longer to ensure the highest quality and reliability of devices. We're also receiving feedback from potential customers that doing this screening at wafer level is not only cheaper overall, but requires less electrical power from the grid, which has significant benefits. An important part of our story, which we have discussed for years, is the evolution of semiconductors that has driven the increased need for wafer level burn-in. This includes the fact that semiconductors are becoming less reliable with the transition to smaller geometries, devices are physically larger, And more devices are being developed on compound semiconductors like silicon, carbide, and gallium nitride, which require additional burn-in and stress testing, such as Aehr provides, to meet the stringent quality and reliability needs of their customers in the end markets. AI processors and other high-performance central processing units, or CPUs, and network processors are also facing limitations related to their physical size due to the reticle limit in semiconductor manufacturing. The reticle limit is the maximum area that can be exposed in a single pass of the lithography equipment. Due to the reticle limit, a single chip or die cannot exceed this maximum area. This is a physical constraint imposed by the manufacturing process. AI models, especially large language models, require massive amounts of computation and memory. This translates to the need for increasingly large and complex chips. The GPUs used for AI training have already reached the reticle field limit. In order to overcome the reticle limit that prevents them from building a single massive chip, manufacturers are using chiplets, which are smaller die that can be interconnected to form a larger system. This approach effectively circumvents the reticle limit and allows for much larger total transistor counts. Advanced packaging technologies such as COAS, or chip on wafer on substrate, and SOIC, or system unintegrated circuits, enable the integration of multiple chiplets onto an interposer allowing for complex high-performance systems that exceed the size of a single reticle. As AI processors require increasingly large and complex designs, chip-like architectures and advanced packaging technologies are being used to overcome this limitation and enable the continued scaling of AI compute power. The reason these matter to Aehr Test is that these devices all need production burn-in screening to remove early failures that would otherwise occur during the lifespan of the AI processor. These failure rates are unacceptable and costly, impacting the end customer and increasing warranty costs for the supplier. In many cases, they can also pose safety issues, especially for processors used in autonomous or driver-assisted vehicle technologies. The screening and burn-in durations vary by process and device, but generally range from one to several hours or even 24 hours or more, depending on the desired quality and reliability level for the end application or customer. These GPUs, particularly those used in data centers and in the creation and use of large language AI models, are not the commodity consumer semiconductors of the 90s and 2000s. These are not chips used in $200 graphics cards for gaming. Instead, these are nodes worth tens of thousands of dollars operated in parallel, thousands at a time. If one node fails, it can completely disrupt the development or construction of the entire language model. As we've discussed with automotive and other applications, reliability is critically important for these customers. Aehr now offers a high-volume production solution for package-level burden with our new Sonoma product line following the acquisition of in-cal technology last year. For customers seeking to perform production screening of these devices in package form, we now provide a highly cost-effective solution with upcoming fully automated JEDEC trade-to-trade device handling and testing. Before our Fox XP wafer-level test and burden system, The only solution for doing this screening was products like our Sonoma system. And while this screening step is cost-effective, and we believe our Sonoma systems offer the lowest cost solutions on the market for packaged part burn-in of AI processors, it not only weeds out defective processors or memory, but also results in discarding highly expensive advanced packages, such as the co-op package and substrate, along with all of the other devices packaged in the failed device. For example, multiple new AI processors feature two or more AI, ASICs, or GPO processors in the advanced package, with each AI processor die containing up to four high-bandwidth memory or HBM stacks, totaling up to eight or more HBM stacks per package. Keep following here. Each of these HBM stacks can be eight die or more in the future, meaning it has eight stack memory dies for HBM stack. You go through all the math and there's a total of up to 64 or more HBM dies and two or more AI processors plus a very expensive co-op package substrate per package. If one of the AI processors or one of the HBM die fails during the production burn-in after packaging, all of the other die plus the co-op substrate are discarded. You can see the cost impact of performing burn-in at the package part level. If you take this a step further, companies also perform a burn-in at the system level when the GPU or AI processor multi-die package is installed on a computer system printed circuit board, along with the device power supplies, heat sinks, and supporting infrastructure, such as all the high-speed interconnect technology for AI processor to AI processor communication. Performing burn-in at this stage impacts cost and yield even more significantly. You can see why the industry is showing such interest in our ability to test these devices at the wafer floor. In addition to this lead customer for AI wafer-level test, we have now received multiple inbound requests from several high-profile processor companies that are very serious about wafer-level testing. This ecosystem is very small, and having demonstrated that wafer-level burden of high-power AI processors is feasible, We're gaining visibility beyond our own sales and marketing efforts with the growing recognition that moving the AI processors and CPUs to wafer level is overwhelmingly advantageous from both a cost perspective and for yield. We're extremely busy right now engaging with multiple companies who are asking, can you test my parts? The conversation is, can Aehr do it, not do we want it? I'm very excited to report today that one of these companies has now asked us to move forward with an evaluation for wafer-level testing of their devices with one of their current high-volume processors. This feasibility study will allow them to see the real advantages and performance of doing a production burn-in at wafer level instead of in package or system-level form as they do today. Based on what they have shared with us, we believe that if this evaluation succeeds, they plan to transition to high-volume production wafer-level testing which would be a significant opportunity for Aehr. While this evaluation involves new wafer packs for their specific wafers, we believe that Aehr can address the needs in the near term with our proprietary AI processor optimized wafer packs designed specifically for these devices. We also have systems needed to run their wafers on our floor today, demonstrating this capability, as well as fully automated aligners to showcase the automation of the 300 millimeter wafer handling. We expect this evaluation to take one or two quarters to complete fully. At the same time, we're working with this customer to determine their production capacity needs and discussing lead times to meet their requirements. Their capacity requirements are significant, and we feel we have the manufacturing capacity for systems, aligners, and wafer racks to meet the potential demand if we're successful with this evaluation and they decide to move to wafer-level burn-in using our solution. We also expect to move to evaluation phases with other AI companies during this fiscal year and believe we can capture a meaningful share of the total production burn-in market for AI processors with our FOX wafer-level test and burn-in systems and proprietary wafer pack contactors. So let me spend a few minutes on some of the other markets quickly, and I'll start with package part burn-in. As I mentioned earlier, we also offer customers the option to perform their package part burn-in screening as well as a qualification reliability characterization for their GPUs, AI processors, CPUs, and network processors. We completed our acquisition of NCAL last July 31st, expanding our product portfolio to include their highly regarded package-part reliability burn-in and test solutions, especially their ultra-high power capabilities for AI processors, GPUs, and computing processors. Since that date, Aehr has shipped more package-part burn-in systems than NCAL did in the last three years. It is a record-breaking sales achievement for the qualification and production burden of AI processors. We're very excited that with the added capabilities and resources from Aehr, we have been able to ramp up production to levels that Intel had never achieved, meeting the demand from AI processor companies for the qualification and production of their devices. With the addition of significant number of people, processes, and scale, we've been able to shorten lead times, maintain low costs, address quality, and do this in a high reliability platform. which has been overwhelmingly positive for customers. As a result, we won our first production AI processor customer for package part burn-in during the fiscal year, receiving initial volume production orders for the multiple Sonoma ultra-high-power systems. This customer is one of the premier large-scale data center hyperscalers that is making their own AI processors and is growing this capacity significantly. These are their first devices that use a production burn-in system at the package part level instead of at the system level. They plan to ramp this device over the next year and are already discussing their next generation process, as well as the one after that with Aehr, to ensure we can meet their production capacity needs. We said before that one of the best things about this acquisition is that it gives us a front row seat to the future requirements of a large number of these AI processor customers, providing us with visibility into the production burning needs. As a result, some of these customers from packaged part side are coming to us asking right away for level burning capabilities. Aehr is the only company in the world that offers both a wafer-level and packaged part burn-in system for both qualification and production burn-in of AI processors. We can provide them with options and show direct side-by-side comparisons of cost of test, capacity output, footprint, operational costs, and impact on yield based on how they decide to do their burn-in. We're in the perfect position to help them while also remaining balanced so we can tell them yes, regardless of how they want to do their burn-in. We're very excited about all our new AI product offerings and the expanded total adjustable market they bring to air, and we look forward to discussing our progress to further capitalize on this new market as we move through our new fiscal year. Another key milestone this past year was expanding the production level burn-in for gallium nitrate power semiconductors. We secured an additional order for our Fox XP high-power wafer production system with high-volume for volume production of GaN devices from a leading automotive semiconductor supplier and a key player in the GaN nitride power semiconductor market, marking their commitment to advancing volume production wafer-level burn in other GaN devices using our XP platform. This achievement expands our production wafer-level burn in market for power semiconductors beyond silicon carbide applications used in electric vehicles, data center power conversion, and solar to now include GaN a high-performance compound semiconductor optimized for mid-power applications such as data centers, solar energy, automotive systems, and consumer electronics and PCs. Additionally, we're in discussions and engagements with multiple other potential new GaN customers about their needs. GaN's a new and exciting semiconductor technology with high-value applications, including automotive power conversion, solar inverters, and solid-state transformers and breakers. GAN offers a much broader application range than silicon carbide and is poised for significant growth in the coming decade. We've also made significant progress in the hard disk drive market. This past year, a lead customer began ordering multiple Fox CP single wafer production test and burn-in systems, featuring an integrated high-power wafer probe for their new high-volume parts in a new application for burn-in and stabilization of new devices in hard disk drives. These are follow-on system orders to the first production order received all the way back in 2019. As we stated in previous calls, their plans for this new product were delayed during the pandemic, but they continue to work on this new device continuously over the last five years to ensure the performance and reliability of their devices. We understand from several analysts and shareholders that this customer has publicly called out our Fox systems as a key contributing factor in helping them achieve the long-term reliability needs of this market. This customer is one of the top suppliers of data storage devices, and we're very excited to start this production ramp after all these years of working with them on qualification and process development. During our last earnings call, I noted that the high-power probers for our Fox CP for this HDD customer are sourced from Japan, and it was unclear how the tariff uncertainty might affect the timing of receiving these probers. At that time, we were hoping to receive this shipment by the end of May, But because of tariff uncertainties, these programs did in fact get significantly delayed. We just received the first one last week. We're working quickly to do the integration and engineering steps needed to finalize the test cell to be able to make the first shipments this quarter. In addition to multiple systems and backlog, the customers told us that they will be purchasing additional systems both in the short term and over time. I know it must be a broken record to hear terms like uncertainty around tariffs on many company earnings calls, but this is still the case. Despite this, we're extremely excited about our growth opportunity for our wafer-level solution for HDD market and look forward to updating you further on the progress next quarter. Now turning to silicon photonics ICs. This market continues to demonstrate market adoption for optical chip-to-chip communication and optical network switching. Several companies, including AMD, NVIDIA, Intel, TSMC, and Global Foundries have announced product roadmaps for devices that utilize optical chip-to-chip communication. We have several customers in this space. At last count, it was five to six customers, with one of the customers being an OSAT that purchases our tools for one customer but is marketing it to others. We've seen a significant number of new wafer pack designs from our install base of systems for new designs that they use for qualification development work on their FOX wafer-level test and burn-in systems. We also now offer a new system with higher power, 3,500 watt per wafer configuration, to meet the needs of new higher power wafers for optical IO and chip-to-chip communication devices. This is also available as an upgrade to our Fox NP systems for low volume production, as well as for Fox XP 9 wafer production systems. Recently received another order for an upgrade to one of the Fox XPs we shipped a few years ago that includes upgrading to include our new integrated wafer pack auto liner, which provides fully hands-free factory automation of silicon photonics integrated circuit wafers. We also have forecasts for new systems for incremental capacity this fiscal year for both systems and wafer packs. We're well prepared with expanded manufacturing capacity for Fox high-power systems and remain enthusiastic about the silicon photonics market, especially for the new application of silicon photonics integrated circuits and optical chip-to-chip communication, which we see as a significant market opportunity for our products. It seems odd to wait this long to talk about silicon carbide, but let me talk a little bit about that market as well. The silicon carbide power semiconductor market remains a significant opportunity for air, and we believe we're well positioned to continue to grow with our current customers in this sector, as well as add some additional customers in this space over time. Despite a slowdown in the growth of electric vehicle shipments, electric vehicles are still growing significantly worldwide, and we believe the silicon carbide market continues on a robust long-term growth trajectory. Demand for silicon carbide remains significantly driven by battery electric vehicles, but silicon carbide devices are also gaining traction in other markets, including power infrastructure, solar, and various other industrial applications. This quarter, we shipped our first configuration of the Fox XP, which can test 18 wafers at a time in a single system with support for our high-voltage test resources that can test devices up to 2,000 volts in wafer form. The system also includes a proprietary arc suppression technology that prevents the devices from electrically arcing at these high voltage while testing all devices at a time in a single insertion on each of 18 wafers. This capability has already proven in our nine wafer configuration but is now extended to the 18 wafer system. It's also capable of being directly docked to our fully automated wafer pack aligner that takes industry standard wafer cassettes and foops to allow full factory integration. We believe we're well positioned in the silicon carbide market as we have a large customer base and the industry leading solution for wafer level burn-in. So lastly, a little bit on our flash memory proof of concept project that we've been working on this year. As noted in earlier calls, we're collaborating with one of the world's leaders in flash memory to demonstrate the capability and cost effectiveness of our Fox XP platform for high volume production wafer level testing in burn-in and flash memory wafers. This is very exciting because we believe Aehr can successfully demonstrate how to create a high density, high power, fully automated test cell, which will help us move to the next development phase. That next step involves working together to develop a next-generation test system specifically designed to meet this customer's needs. Although this memory validation benchmark has taken us a bit longer than expected due to shipment delays in some of the components of this integrated system, the new MEMS-based fine-pitched wafer-packed full wafer contactor is in-house and ready to complete the benchmark. We're very encouraged, and we hope to generate data and results this quarter with the aim of completing the benchmark by next quarter. New technologies in NAND are driving new requirements for wafer-level burn-in to address the manufacturing and negative yield implication of testing these devices at package or system level. We believe that AERS-FOX wafer-level test and burn-in platform, combined with our proprietary wafer-packed full wafer contactors, is well-positioned to offer a competitive and cost-advantaged solution in this market. Looking ahead and concluding, Aehr is well positioned to capitalize in growth in the overall semiconductor market. We remain focused on addressing the critical reliability requirements of next generation applications and leveraging key megatrends shaping our industry. Today, reliability is a vital priority across diverse sectors, including combustion, electric vehicles, data centers, infrastructure electrification, and then expanding range of AI applications. As we enter fiscal 2026, we've established the infrastructure and capacity to support significant growth. This was the purpose of the investments we made this past fiscal year, including the upgrade of our manufacturing facility, including upgrades to power and infrastructure, consolidating package and wafer-level burning under one roof, and implementing the necessary processes to support a very high volume of both wafer-level and package-level test and burning systems and our proprietary wafer pack contactors. These foundational efforts are now complete. In the year ahead, we plan to increase our research and development investment to support further product enhancements, expand our R&D resources, hire additional talent to serve our growing AI customer base, and enhance automation to improve scalability. Beyond these initiatives, the new fiscal year will focus on securing and executing orders. We believe that nearly all the opportunities and market verticals we discussed today will experience order growth in fiscal 2026. The one exception may be silicon carbide, as customer forecasts for this market are back half loaded, with stronger growth expected in our fiscal 27. Still, there are many variables, and silicon carbide may end up growing faster than expected, giving the market share shifts currently underway and our lead customers increasing market share in the industry. During our previous earnings call, we announced the temporary withdrawal of our financial guidance following the U.S. administration's tariff announcements just a few days earlier. At that time, we were concerned about the potential secondary impacts on our current and prospective customers, as well as the possibility of pauses or delays in customer orders, shipments, or supply chain deliveries. We remain very confident errors long-term outlook, but we are still seeing the impact of tariff-related uncertainty on the timing of specific orders, particularly in our first quarter. As a result, we've chosen to maintain a cautious approach and are not reinstating specific guidance at this time beyond what we've already stated, which is that we anticipate order growth across all segments in this fiscal year, with this possible exception of silicon carbide. We're very optimistic about our growth opportunities in all the segments we've discussed and our ability to meet the potential demand of these markets. With that, I'll turn it over to Chris.

Chris Siu | Chief Financial Officer, Aehr Test Systems

Thank you, Gane. Before I review our financial results, I'd like to provide an update on the integration of our in-cal acquisition, which we completed on July 31st of last year. Since the acquisition, Aehr has dedicated significant financial and human resources to ensure a successful integration of InCal into our operations. We have fully migrated InCal's financial records into our Oracle NetSuite Cloud ERP system and integrated their HR and manufacturing functions into Aehr's broad information systems. Additionally, we have completed transfer of all inventory, as well as comprehensive documentation of product designs source code and assembly and test instructions into AehrS processes. I'm pleased to report that our plan to consolidate personnel and manufacturing into AehrS Fremont facility was complete by the fourth quarter of fiscal 2025. And we successfully closed the in-camp facility on May 30th, 2025, ahead of our original schedule. I want to express my sincere thanks to our teams for their commitment, dedication and outstanding execution throughout this integration. As a result of the consolidation, we incurred one-time restructuring charges of $864,000 in our fiscal fourth quarter related to closure of the in-cal facility. With the integration of the two companies, we'll be able to create synergy and reduce our facility costs by over $800,000 per year going forward. Turning to the full year results, we reported revenue of $59 million down 11% year-over-year. Our full year non-GAAP growth margin was 44%, compared to 49.6% in the prior year. Our full year non-GAAP net income was $4.6 million, or $0.15 per diluted share in fiscal 2025, compared to non-GAAP net income of $35.8 million, or $1.21 per diluted share in fiscal 2024. which included the impact of a one-time tax benefit of approximately 20.7 million, resulting from the release of the company's full income tax valuation allowance. Our annual bookings in fiscal 2025 were 61.1 million, up over 24% compared to 49 million in the prior fiscal year. The increase in bookings was primarily related to the sales of AI processor burning systems. wafer packs, and burn-in module boards, partially offset by lower customer orders related to silicon carbide wafer packs. Our backlog as of the end was 15.2 million, with 1.1 million bookings received in the first five weeks of the first quarter of fiscal 2026. We now have an effective backlog of 16.3 million. Turning to our Q4 performance, we're excited about our continued momentum in penetrating the artificial intelligence market. with AI processors burning now accounting for over 35% of our business this year, compared to zero last year. For the fourth quarter, we had three customers representing over 10% of total revenue, and two of these customers target the AI market. Revenue for the fourth quarter totaled $14.1 million, a 15% decrease compared to $16.6 million in Q4 last year. The year-over-year decrease was primarily due to a delayed shipment of a Fox CP system that was forecasted to be shipped to our hard disk drive customer. Because of tariff-related uncertainties, public source from Asia to support the Fox CP system were delayed. We now expect to complete this shipment in our current quarter, Q1 of fiscal 2026. Wafer pack revenues were $4.2 million and accounted for 30% of our total revenue in the fourth quarter. Wafer Pack revenues continue to represent a sizable revenue stream for our business, driven by the ongoing demand for new Wafer Pack designs from both existing and new customers, and they secure new end customer designs and strive to meet their market requirements. We are pleased with the significant progress we made integrating products from our in-cal acquisition into our product portfolio to capitalize on emerging opportunities in the AI market. Sales of our Sonoma, Tahoe, and Echo package part burning systems continue to contribute strongly, accounting for 44% of our fourth quarter revenue. We believe our strategy to expand Aehr's product offerings and diversify beyond second callback applications is gaining meaningful traction in the marketplace. Non-GAAP growth margin for the fourth quarter was 34.7%, compared to 51.5% in the same period last year. Non-GAAP growth margin decreased primarily due to lower overall revenue level compared to Q4 last year and less favorable product mix. Additionally, we incurred high manufacturing overhead due to underabsorption as our manufacturing capacity utilization was lower during the renovation of our Fremont site and the consolidation of inventory from the in-cal facility. Non-GAAP operating expenses in the fourth quarter were $5.4 million, reflecting a 6% increase from 5.1 million Q4 last year. This year-over-year rise is primarily attributed to the inclusion of in-cows operating expenses in our financial results, as well as higher legal and professional service fees. We anticipate incurring additional legal expenses in the upcoming quarters as we continue to protect our intellectual property rights in China. Non-GAAP net loss for the fourth quarter excluding the impact of stock-based compensation, amortization of intangible assets, and restructuring charges was $248,000, or negative one penny, per diluted share, in line with the street consensus. This compares to a non-GAAP net income of $24.7 million, or $0.84 per diluted share, in the fourth quarter of fiscal 2024, which, as a reminder, including a one-time tax benefit of approximately $20.7 million resulting from the release of the company's full income tax valuation allowance. Moving to the balance sheet, at the end of Q4, our cash, cash equivalents, and restricted cash totaled $26.5 million, down from $49.3 million at the end of Q4 fiscal 2024. During fiscal 2025, We used $11 million to acquire Incal, which enabled us to enter the AI market and secure key customer relationships with his superior package part burn-in product, Sonoma. Additionally, we spent $5 million on CapEx to support the consolidation and upgrade of our Fremont manufacturing facility and headquarters, and used $3.6 million to procure inventory and $3.8 million for the remaining working capital. We have no debt and continue and continue to invest excess cash in money market funds to generate interest income. Let me provide an update on the class action claims and derivative lawsuit filed against Aehrtas on December 3, 2024. We are pleased to report that on May 16, 2025, the court appointed lead plaintiff for the class action lawsuit elected to voluntarily dismiss the case, with all parties bearing their own fees and costs. On June 9th, 2025, the court also dismissed the derivative lawsuit without prejudice. The company believes the claims in all these cases were without merit. Following the voluntary dismissal of the shareholder class action and the court's dismissal of the consolidated derivative action, no related proceedings are currently pending. As Gayn mentioned, considering the secondary effects of the tariff announcements on our current and potential new customers, along with the uncertainty this quarter regarding possible pauses or delays in customer orders, shipments, or supply chain delivery delays. We're temporarily withholding our guidance for our fiscal 2026 year, and we'll reassess our guidance policy as clarity develops. Despite the uncertainties around tariffs, we're excited about the long-term growth opportunities across our more diverse target markets. We're especially encouraged by the progress we've made in addressing the artificial intelligence processes market and other potential high-growth sectors, including gallium nitride power semiconductors, data storage devices, Seacom Photonics integrated circuits, and flash memory. To succeed in these new markets, we plan to increase our research and development investments this fiscal year by expanding our R&D resources and hiring additional talent in the US and the Philippines to support our growing AI customer base and increase automation for scalability. With more R&D talent, a strong infrastructure, and enhanced manufacturing capabilities in place, we're more prepared than ever to achieve our growth objectives. Lastly, you may have noticed that we are holding this earnings call one week earlier than usual because of the CEO Summit has been pushed back from July to October and will be held in Phoenix instead of San Francisco. Looking at the investor relations calendar, Aehr Test will be participating in two upcoming conferences over the next month. We'll be meeting with investors virtually at the Needham Sixth Annual Semiconductor and Semicab One-on-One Conference on Wednesday, August 20th. The following week, we'll meet with investors in person on Tuesday, August 26th at the Jefferies Technology Summit Conference in Chicago. We hope to see some of you at these conferences. This concludes our prepared remarks. We're now ready to take your questions. Operator, please go ahead.

Operator | Conference Operator

Thank you. At this time, we will be conducting a question and answer session. If you would like to ask a question, please press star one on your telephone keypad. A confirmation tone will indicate your line is in the question queue. You may press star two if you would like to remove your question from the queue. For participants using speaker equipment, it may be necessary to pick up your handset before pressing the star keys. One moment, please, while we poll for questions. Once again, please press star one if you have a question or a comment. Our first question comes from Christian Schwab with Craig Hellam.

Please proceed. Christian Schwab | Analyst, Craig-Hallum Capital Group

Again, I've received a lot of questions regarding your most recent slide in your investor deck with a lot of well-known marquee names. Should investors think of that list as a list of current and previous customers, or does it include maybe names of prospective customers you know, such as new AI customers that you're working with or new silicon photonics customers, et cetera? How should we be thinking about that slide?

Gayn Erickson | President and CEO, Aehr Test Systems

Okay. So when we introduced that slide, we updated the customer slide a few weeks ago compared to the deck that we've had on our website prior to that. And we were actually at a conference that had a public speaking. It is recorded and available to all people through our website. In that specific conference, I pointed out that we have updated the customer list to reflect the current customers from the in-cow package part burn inside of our business. Those are customers, not prospects. And yes, there's some notable names on there. Not every single customer is still on there. Actually, there's been some historical 10% customers that we had specific agreements with or limitations of ever saying their names publicly other than referencing when they were doing 10% of our revenue. But yeah, there's some good names on there.

Christian Schwab | Analyst, Craig-Hallum Capital Group

Great. And that is, it's released to 10% customers. Are you, since you didn't mention it a few times without naming the names, is that going to be in your K when you file it, or are you not going to name the 10% customers?

Gayn Erickson | President and CEO, Aehr Test Systems

So we're, yeah, we're, the new SEC rules do not require you to name it. So unless we already have prior arranged agreements with the customers to name them, we're no longer doing that. Prior to that SEC rule, we could name them even if the customers objected, if you will, but we're not doing that now.

Christian Schwab | Analyst, Craig-Hallum Capital Group

Great. And then as the AI opportunity seems quite significant, I know you in previous conference calls said that that market could be materially bigger than what you had previously said, that the silicon carbide opportunity could be over time. if wafer-level burden was used by many people. Can you give us any idea of, not this year or next year, but over time, have you walked through the maps?

Gayn Erickson | President and CEO, Aehr Test Systems

Yeah, as you can imagine, we have. So similar to how we built up the original silicon carbide models, that took a look at say the target applications for silicon carbide, which were primarily the electric vehicles, how many EVs, how many components would be in it, et cetera, et cetera. You could come up with how many wafer starts that would require in, say, 2030. And I know that you had put some models together at that time. There were about 4 million wafer starts. We looked at 12-hour burn-in times, single insertion with our systems. Long story short, we saw that the total market was somewhere 350 of our systems with ASPs about $4 million a piece or something like that. If you look at the AI market, the AI market, interestingly, in that same timeline, may actually be half as many wafers, which seems a little odd, but they're 300-millimeter wafers, and you actually don't test them in one single touchdown. They'll take multiple touchdowns to test these wafers because they might have 20,000 watts power on them and we're testing three four thousand watts at a time you can kind of go through the math at even significantly lower average burn-in times then say the silicon photonics I'm sorry the silicon carbide is that you go through the math and the the market is you know three to five times larger than the silicon carbide was one of the things that we'll be looking at is what are the burn-in times you know we have We're doing burn-in of customers around the world, and we have customers that are doing one-hour stress time, some four-hour burn-in times, and 24-hour burn-in times, for example, all the way up. So it'll be interesting to see, and we think that's related to how much – the longer the burn-in time, the higher the quality ends up being to the end customer. And so it kind of depends on both availability, capacity, and what the target customer is required, and how critically important it is to get to the quality levels. So there's a little bit of dynamics in here, but there's no way to do the math and not come out with it being significantly larger.

Christian Schwab | Analyst, Craig-Hallum Capital Group

Fantastic. No other questions. Thanks, Gayn.

Operator | Conference Operator

Thank you. The next question comes from Jed Dorsheimer with William Blair.

Please proceed. Jed Dorsheimer | Analyst, William Blair

Hi. Yeah, thanks for taking my question. I guess first one, either Gayn or Chris, just the step down in gross margin quarter to quarter, or year over year or two. I'm assuming that it's a mix issue in terms of drop off of wafer pack consumables and a mix towards in-cow. Is there anything else that should be called out with respect to shift in margins? Of course, lower revenues to spread the fixed costs, but is it primarily mix in revenue levels?

Gayn Erickson | President and CEO, Aehr Test Systems

There's two types of mix in this thing, too. There definitely was a mix in that we actually, when some of the wafer-level burden orders didn't materialize as we were kind of thinking at the time, we actually pulled in some packaged part systems. And the packaged part systems have a little lower margin. The consumables have a lot less margin than our wafer packs, for example. But the other piece is during that quarter, we had the full burden of the in-cal facility as well, which we talked about now not having kind of carrying forward. So we had the double whack of both facilities going on with, you know, primarily just package part burn-in revenues and some wafer packs. So I think as we go forward, you know, the same quarter would be materially better. And of course, we have the potential of much higher volumes as we go forward.

Chris Siu | Chief Financial Officer, Aehr Test Systems

Yeah, just to add on that, also the utilization was not as high as before because we were moving. Some of the folks actually were helping with the moves into operations. Not building in any... Yeah, not building products instead of. So we got to expense those labor costs.

That's helpful. Jed Dorsheimer | Analyst, William Blair

Thanks. And then, Gane, just maybe if you could... You know, your tenor around AI processors has certainly skewed much more positively over the past year. And, you know, I know that Silicon Photonics, you took time to call that out. Copackaged optics are becoming a more meaningful part of the design. I'm just curious... What was – you know, is it just the size of the TAM? There seems like there is a specific shift in terms of your excitement around this market, and is it a function of your technology and the moat that you have? If you wouldn't mind just explaining – and maybe I have that wrong, so – Oh, no.

Gayn Erickson | President and CEO, Aehr Test Systems

Yeah, I think you're – I believe, I think people often ask, you know, what makes you lose sleep at night and what makes you excited? There's a material difference in our story related to AI from, you know, nine months ago, maybe six months ago. Nine months ago, we were serious when we said we're doing this evaluation with the first AI customer. And while we believe it will work, we still have to work through it. We also didn't finalize the burn-in times, et cetera. Now that we've proven that it works, understand the size of the market through the burn-in times, and candidly delighted the customer, if you will, we're now also recognizing that the features that we implemented in that machine are applicable to other customers. So at the time, if you said, okay, nine months ago, it's like, I think this is going to work. And the customer was cheering us on. Then it worked. And then the customer, you know, two quarters ago gave us an order and we shipped it, you know, weeks later it felt like, okay. To now we have inbounds from customers to we're now evaluating on paper the qualification of those devices and recognizing we can test your parts and this is why. So you're starting to see in the eyes of the customers looking back at you the value that you have in doing this and the sincere interest in trying to make this happen. They're like, how can you make this happen? So if it's not coming across clear enough, and I know as a CEO you have to be careful of, you know, I'm always a cheerleader, but this is very real in their eyes. And we used to talk about, you know, stacked memories and how important it would be to burn them in before you stack them. You're taking devices that are maybe $2 and you're putting them eight high to make a $16 or $20 part. Then we talk about silicon carbide devices that were going into these modules for EVs. We were taking $10 parts, putting 10 of them into a package and selling them for $200 and look at the value added by doing that. Now we're talking about HBM stacks where the stack of memory is hundreds of dollars times eight stacks processors that are $1,000 a copy of out of a TSMC fab, they're all stacked together and they all need production burn-in. The math is so obvious about the value of, move this to wafer level, that it's just more about what can you do to prove it. And we have the ability now to not only physically show it, we can bring customers in, we have tools in-house that are configured for AI, high power, 300 millimeter wafers with our aligners, They can see wafer packs. We've upgraded the facility with enough power to be building 10 to 20 systems at a time if needed. That's not to imply that that's how big our forecast is, but we have that capacity. And they come in and look and go, okay, I get this. So the other thing, and I made some comment, kind of a snide comment, the customer enthusiasm exceeds our ability to sell and market, and that's not a dig on my sales and marketing team. What we believe has happened is that these customers are being walked by the tool and tools, I should say, because it's tools actually, and seeing the feasibility of it. And so the biggest OSAP is marketing this capability. And we're getting these people calling and say, whoa, whoa, hold on a second. I mean, I guess I got the press release, but I just saw it or understand it. What do I need to do to do that? So you can imagine you'd be pretty excited about that.

Jed Dorsheimer | Analyst, William Blair

Yeah, no, certainly. Um, that's helpful. Last question for you along those same lines. And you mentioned the OSAT that's starting to market. So you've got an OSAT in your silicon photonics, uh, an OSAT or two that you're working with in the AI processor. Um, and mostly customers, that own the design for the AI processors. What you haven't mentioned, you did mention TSMC, but I'm just curious from a foundry perspective, where are the discussions with foundries in the process? Are you seeing some cross-pollinization like you are with OSATs?

Gayn Erickson | President and CEO, Aehr Test Systems

For sure. Yeah. So I'm going to use a little different vocabulary. In this world, there's only really two foundries. Well, to be respectful for Intel, maybe three that can build them. So Global Foundries isn't really building AI processors because of the nodes they're on. So you're really talking about TSMC and potentially Intel? Yeah. With TSMC having, right now I think everybody but Intel. And then you talk about design houses. Design houses are the companies that are actually working with the hyperscalers in designing their new ASICs or AI processors. So you're talking about Marvell, Broadcom, all chip as examples. Those are the big guys that are actually doing the new designs. Then, of course, some of the big hyperscalers have in-house design. They then work with the models, say, for example, with TSMC that will provide them with the models based upon what particular node they're at. That will have DFT, design for testability, features and functionality inside of it that interestingly make them common. And then they can outsource that to really two or three of the big OSATs, the biggest one being ASE, who also bought Spiel, but people think those are two different companies, but candidly, they're really the same. And then you have Amcor. You have Japan that is trying to get some of the business started. J-C-T, and then they're not an OSAT, they're just test, and that's K-Y-E-C. So it's a pretty small community and a lot of cross-pollinization of ideas, I would say, and awareness. And so once this system got put into production, the lights started to go on and the phone started to ring with people saying, hey, wait a minute, I thought that was just a marketing thing. This is real. Can you do my part too?

Thank you. Larry Shlebina | Analyst, Shlebina Capital

I hope that helps.

Operator | Conference Operator

The next question comes from Igor Dolmachev with Freedom Broker.

Please proceed. Igor Dolmachev | Analyst, Freedom Broker

Hello, Jens. Thank you for the market comments. I wanted to get a glimpse into your outlook for 2027, especially for TSMC measure. Recently, JSMC reported that JSMC plans to win down Galleon Mid-Ride Foundry Services by 2027. Could you share your thoughts on how this shift in market can impact your business and address small markets?

Gayn Erickson | President and CEO, Aehr Test Systems

Okay. So, I mean, we chose not to give guidance on 26. I'll be struggling with 27. But, you know, we do believe we can get back to the track of growing significantly over this period of time. The size of the market, for example, between AI, silicon photonics for optical chip-to-chip communication, and you add in silicon, you know, even silicon carbide are all kicking in pretty hard in 27. So, you know, we're planning for... you know, pretty significant growth. I'll leave it at that, okay? Now, you specifically talked about GAN and TSMC. TSMC, mostly I wake up every day thinking about all the AI wafers that TSMC is doing. GAN, you know, gallium nitride can be put onto multiple different process substrates. The most kind of interesting one would be on silicon, large silicon substrates. But a lot of the – they're both IDM folks around the world, like Infineon, for example, or people that have dedicated foundries. And then TSMC is also doing a foundry. I don't know what TSMC's market share is, but I – Candidly, when I talk to customers, I hear a lot more about the other foundries or their own IDM sources than TSMC. So I don't believe that it has a negative impact on us if they start to wind down that business. I think that just shows up somewhere else, either at one of the IDMs or one of the other foundries.

Igor Dolmachev | Analyst, Freedom Broker

Okay, great. Thanks. And in terms of your new AI clients, how long will it take to pass all qualifications to reach your final decisions? for your client after you get the first client delivered?

Gayn Erickson | President and CEO, Aehr Test Systems

So we already have the first client. We announced that we were, I think this year exactly, we announced that we had a commitment from a first customer to evaluate our solution for AI. We said we're very excited about it, but there was still a lot of uncertainties. The customer seemed extremely willing and pulling us in. I think I used the term they're more excited than we are and more hopeful about getting the business, which, of course, was good. Then within a quarter, we said it was progressing pretty well. The following quarter, we said we are now testing wafers and the data looked good. And within that quarter, they placed an order and we shipped it at the same time. That was the first customer, which there's some argument takes longer than the second one. I will tell you our enthusiasm and confidence is a lot more higher because of actual evidence, but there's still some variables and things that we still need to worry. My attorneys will always tell you, be careful, there's always risk, and you never know until the order's in hand. But we think that a decision could be made within, say, six months or so, and, you know, potentially orders placed somewhere thereafter.

Igor Dolmachev | Analyst, Freedom Broker

Yeah, I got it.

Thank you. It was useful. Operator | Conference Operator

Thank you. The next question comes from Larry Shlebina with Shlebina Capital.

Please proceed. Larry Shlebina | Analyst, Shlebina Capital

Hi, Gane. That first AI customer at the OSAT. So are you under the... belief that they're really pleased with it and do you expect more orders from them in the near future? Yes, to both of those.

Gayn Erickson | President and CEO, Aehr Test Systems

Wait a minute, you said near future. I want to be careful of setting any timelines, but I'll go out and say we expect just more this year, though.

Larry Shlebina | Analyst, Shlebina Capital

And then now you have another AI customer in evaluation. So that's the second one for wafer-level burn-in. And then you have a third one that's going after the production in the package part burn-in. Are they three distinct AI customers, or are they – Yes.

Igor Dolmachev | Analyst, Freedom Broker

Yes.

Larry Shlebina | Analyst, Shlebina Capital

Totally different. Totally different. And in the write-up, you said that you shipped a 18 – wafer, high-power, silicon carbide system. Did that ship and book in the May quarter?

Gayn Erickson | President and CEO, Aehr Test Systems

Yes, yes. And it was an upgrade to one of the systems that they had purchased earlier. Part of our strategy and one of our commitment with customers is this commitment to a platform that allows people to maintain forward-backwards compatibility. So that was a really big deal. They shipped the system here. We reworked the system and then shipped it back to them, capable of testing 18 wafers at a time at high voltage, which is amazing.

Larry Shlebina | Analyst, Shlebina Capital

And that also included the automated aligner?

Gayn Erickson | President and CEO, Aehr Test Systems

Actually, in this case, it did not. It shipped back without the automated aligner.

Larry Shlebina | Analyst, Shlebina Capital

Do you anticipate...

Gayn Erickson | President and CEO, Aehr Test Systems

By the way, they have automated aligners, but we only upgraded the system, basically.

I see. Larry Shlebina | Analyst, Shlebina Capital

Do you anticipate going forward that all the silicon carbide systems will be high power?

Gayn Erickson | President and CEO, Aehr Test Systems

Actually, we refer to them as high voltage, but I know what you mean. Mostly, yes. We've been working really closely with the OEMs and making them aware, like the car suppliers, the EV guys. to making them aware of the capability to be able to continue to provide lower and lower cost solutions that include the high voltage insertion as well if they want to do it. I would say that it's mostly likely that people will buy it with that. And it allows you to do it with multiple different stress conditions, but this allows you to also do the stress condition with high voltage, which is very valuable.

Larry Shlebina | Analyst, Shlebina Capital

Does that include a premium? Do you get a premium price on that going forward or not?

Gayn Erickson | President and CEO, Aehr Test Systems

Yeah, the option does cost additional dollars.

That's correct. Larry Shlebina | Analyst, Shlebina Capital

Okay, I've got to get my memory question in. You talked up how it makes so much sense for HBM to go to wafer-level burn-in. When are you going to get a valuation going for an HBM application?

Gayn Erickson | President and CEO, Aehr Test Systems

That's a good question. We've talked about, you know, walking before we run and the walking to begin with was the wafer level burn and application for the NAND flash. But one of the critical things that we mentioned last time, but I'll mention again today, one of the most specific things we were implementing was a new fine pitch MEMS wafer pack that allow us to get to very attractive price points at extremely high pin counts. But it also allows us to go to four times or one-fourth the pitch. These are distances, if you will, than what we have today. That fine pitch is technically fully capable of doing DRAM as well. We knew that on purpose. So one of the critical things is there was no way to contact a DRAM HVM device with our previous wafer packs, but we now enable it through this wafer pack. There's also things on the AI roadmap that are reusing the technology developed under this as well.

Larry Shlebina | Analyst, Shlebina Capital

So now that you have the MEMS fine pitch wafer pack, And it's proven out on Flash, is that correct? We're trying to get it finalized throughout this quarter here. Okay, so it seems like that would entice one of the HBM guys to say, boy, this could solve a big problem that we have as we go from eight stacks to 12, possibly eventually up to 24 stacks. Yeah, I think you're right on that. All right. Well, we'll be waiting to hear when you do that. That's all the questions I have. Thanks, Larry.

Thank you. Take care. Operator | Conference Operator

Okay. We have no further questions in the queue. I'd like to turn the floor back to management for any closing remarks.

Gayn Erickson | President and CEO, Aehr Test Systems

All right. Well, I thank everybody for their patience, and I fully recognize that our prepared comments were At least 10 minutes longer, we added about a 15-minute chunk in the middle to do detail and get on record the information around the AI that we won't need to do next time as well. And hopefully we can just give you an update on the successes that we're having there. So I appreciate everyone's patience and listening through this. And if you have any follow-on questions, you can reach out to us. We'll be happy to take the call.

Thank you very much. Chris Siu | Chief Financial Officer, Aehr Test Systems

Thank you.

Operator | Conference Operator

This concludes today's conference and you may disconnect your lines at this time. Thank you for your participation. jsPDF 3.0.3 D:20260608224625-00'00'